Made the following suggested changes.

Raised another PR itself to deal with generic changes in
StackSlotColoring pass needed to resolve current ticket.

Merged multiple mir test cases into one to be concise.

Author: vg0204

llvm/include/llvm/CodeGen/Passes.h

@@ -283,7 +283,7 @@ namespace llvm {
   /// critical-path and resource depth.
   extern char &MachineCombinerID;
 
-  /// StackSlotColoring - This pass performs stack coloring and merging.
+  /// StackColoring - This pass performs stack coloring and merging.
   /// It merges disjoint allocas to reduce the stack size.
   extern char &StackColoringID;
 
@@ -371,8 +371,6 @@ namespace llvm {
 
   /// StackSlotColoring - This pass performs stack slot coloring.
   extern char &StackSlotColoringID;
-  FunctionPass *
-  createStackSlotColoring(bool preserveRegAllocNeededAnalysis = false);
 
   /// This pass lays out funclets contiguously.
   extern char &FuncletLayoutID;

llvm/lib/CodeGen/StackSlotColoring.cpp

@@ -65,10 +65,6 @@ namespace {
     MachineFrameInfo *MFI = nullptr;
     const TargetInstrInfo *TII = nullptr;
     const MachineBlockFrequencyInfo *MBFI = nullptr;
-    SlotIndexes *Indexes = nullptr;
-
-    // - preserves Analysis passes in case RA may be called afterwards.
-    bool preserveRegAllocNeededAnalysis = false;
 
     // SSIntervals - Spill slot intervals.
     std::vector<LiveInterval*> SSIntervals;
@@ -145,9 +141,7 @@ namespace {
   public:
     static char ID; // Pass identification
 
-    StackSlotColoring(bool preserveRegAllocNeededAnalysis_ = false)
-        : MachineFunctionPass(ID),
-          preserveRegAllocNeededAnalysis(preserveRegAllocNeededAnalysis_) {
+    StackSlotColoring() : MachineFunctionPass(ID) {
       initializeStackSlotColoringPass(*PassRegistry::getPassRegistry());
     }
 
@@ -533,7 +527,6 @@ bool StackSlotColoring::runOnMachineFunction(MachineFunction &MF) {
   TII = MF.getSubtarget().getInstrInfo();
   LS = &getAnalysis<LiveStacks>();
   MBFI = &getAnalysis<MachineBlockFrequencyInfo>();
-  Indexes = &getAnalysis<SlotIndexes>();
 
   bool Changed = false;
 
@@ -567,9 +560,4 @@ bool StackSlotColoring::runOnMachineFunction(MachineFunction &MF) {
   Assignments.clear();
 
   return Changed;
-}
-
-FunctionPass *
-llvm::createStackSlotColoring(bool preserveRegAllocNeededAnalysis) {
-  return new StackSlotColoring(preserveRegAllocNeededAnalysis);
 }

llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

@@ -1425,7 +1425,7 @@ bool GCNPassConfig::addRegAssignAndRewriteOptimized() {
   // through SGPRAllocPass. So, invoking StackSlotColoring here, may allow these
   // SGPR spills to re-use stack slots, before these spills is further lowered
   // down via SILowerSGPRSpills(i.e. equivalent of PEI for SGPRs).
-  addPass(createStackSlotColoring(/*preserveRegAllocNeededAnalysis*/ true));
+  addPass(&StackSlotColoringID);
 
   // Equivalent of PEI for SGPRs.
   addPass(&SILowerSGPRSpillsID);