Fixups

Author: MacDue

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

@@ -27933,13 +27933,10 @@ bool AArch64TargetLowering::canMergeStoresTo(unsigned AddressSpace, EVT MemVT,
   if (MemVT.isFixedLengthVector() && !Subtarget->isNeonAvailable())
     return false;
 
-  // Do not merge to float value size (128 bytes) if no implicit
-  // float attribute is set.
+  // Do not merge to float value size (128 bytes) if no implicit float attribute
+  // is set.
   bool NoFloat = MF.getFunction().hasFnAttribute(Attribute::NoImplicitFloat);
-
-  if (NoFloat)
-    return (MemVT.getSizeInBits() <= 64);
-  return true;
+  return !NoFloat || MemVT.getSizeInBits() <= 64;
 }
 
 bool AArch64TargetLowering::preferIncOfAddToSubOfNot(EVT VT) const {

llvm/test/CodeGen/AArch64/consecutive-stores-of-faddv.ll

@@ -24,7 +24,7 @@ define void @consecutive_stores_pair(ptr %dest0, <vscale x 4 x float> %vec0, <vs
   ret void
 }
 
-define void @consecutive_stores_quadruple(ptr %dest0,
+define void @consecutive_stores_quadruple(ptr %dest0, <vscale x 4 x float> %vec0, <vscale x 4 x float> %vec1, <vscale x 4 x float> %vec2, <vscale x 4 x float> %vec3) {
 ; CHECK-LABEL: consecutive_stores_quadruple:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ptrue p0.s
@@ -36,8 +36,6 @@ define void @consecutive_stores_quadruple(ptr %dest0,
 ; CHECK-NEXT:    mov v2.s[1], v3.s[0]
 ; CHECK-NEXT:    stp d0, d2, [x0]
 ; CHECK-NEXT:    ret
-  <vscale x 4 x float> %vec0, <vscale x 4 x float> %vec1, <vscale x 4 x float> %vec2, <vscale x 4 x float> %vec3)
-{
   %dest1 = getelementptr inbounds i8, ptr %dest0, i64 4
   %dest2 = getelementptr inbounds i8, ptr %dest1, i64 4
   %dest3 = getelementptr inbounds i8, ptr %dest2, i64 4
@@ -68,7 +66,7 @@ define void @consecutive_stores_pair_streaming_function(ptr %dest0, <vscale x 4
   ret void
 }
 
-define void @consecutive_stores_quadruple_streaming_function(ptr %dest0,
+define void @consecutive_stores_quadruple_streaming_function(ptr %dest0, <vscale x 4 x float> %vec0, <vscale x 4 x float> %vec1, <vscale x 4 x float> %vec2, <vscale x 4 x float> %vec3) "aarch64_pstate_sm_enabled" {
 ; CHECK-LABEL: consecutive_stores_quadruple_streaming_function:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ptrue p0.s
@@ -79,8 +77,6 @@ define void @consecutive_stores_quadruple_streaming_function(ptr %dest0,
 ; CHECK-NEXT:    faddv s3, p0, z3.s
 ; CHECK-NEXT:    stp s2, s3, [x0, #8]
 ; CHECK-NEXT:    ret
-  <vscale x 4 x float> %vec0, <vscale x 4 x float> %vec1, <vscale x 4 x float> %vec2, <vscale x 4 x float> %vec3) "aarch64_pstate_sm_enabled"
-{
   %dest1 = getelementptr inbounds i8, ptr %dest0, i64 4
   %dest2 = getelementptr inbounds i8, ptr %dest1, i64 4
   %dest3 = getelementptr inbounds i8, ptr %dest2, i64 4