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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 |
| 2 | +; RUN: opt < %s -passes=instcombine -S | FileCheck %s |
| 3 | + |
| 4 | +define i32 @test_or_fshl(i32 %a, i32 %b, i32 %c, i32 %d, i32 %sh) { |
| 5 | +; CHECK-LABEL: define i32 @test_or_fshl( |
| 6 | +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]], i32 [[D:%.*]], i32 [[SH:%.*]]) { |
| 7 | +; CHECK-NEXT: [[VAL1:%.*]] = call i32 @llvm.fshl.i32(i32 [[A]], i32 [[B]], i32 [[SH]]) |
| 8 | +; CHECK-NEXT: [[VAL2:%.*]] = call i32 @llvm.fshl.i32(i32 [[C]], i32 [[D]], i32 [[SH]]) |
| 9 | +; CHECK-NEXT: [[RET:%.*]] = or i32 [[VAL1]], [[VAL2]] |
| 10 | +; CHECK-NEXT: ret i32 [[RET]] |
| 11 | +; |
| 12 | + %val1 = call i32 @llvm.fshl.i32(i32 %a, i32 %b, i32 %sh) |
| 13 | + %val2 = call i32 @llvm.fshl.i32(i32 %c, i32 %d, i32 %sh) |
| 14 | + %ret = or i32 %val1, %val2 |
| 15 | + ret i32 %ret |
| 16 | +} |
| 17 | +define i32 @test_and_fshl(i32 %a, i32 %b, i32 %c, i32 %d, i32 %sh) { |
| 18 | +; CHECK-LABEL: define i32 @test_and_fshl( |
| 19 | +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]], i32 [[D:%.*]], i32 [[SH:%.*]]) { |
| 20 | +; CHECK-NEXT: [[VAL1:%.*]] = call i32 @llvm.fshl.i32(i32 [[A]], i32 [[B]], i32 [[SH]]) |
| 21 | +; CHECK-NEXT: [[VAL2:%.*]] = call i32 @llvm.fshl.i32(i32 [[C]], i32 [[D]], i32 [[SH]]) |
| 22 | +; CHECK-NEXT: [[RET:%.*]] = and i32 [[VAL1]], [[VAL2]] |
| 23 | +; CHECK-NEXT: ret i32 [[RET]] |
| 24 | +; |
| 25 | + %val1 = call i32 @llvm.fshl.i32(i32 %a, i32 %b, i32 %sh) |
| 26 | + %val2 = call i32 @llvm.fshl.i32(i32 %c, i32 %d, i32 %sh) |
| 27 | + %ret = and i32 %val1, %val2 |
| 28 | + ret i32 %ret |
| 29 | +} |
| 30 | +define i32 @test_xor_fshl(i32 %a, i32 %b, i32 %c, i32 %d, i32 %sh) { |
| 31 | +; CHECK-LABEL: define i32 @test_xor_fshl( |
| 32 | +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]], i32 [[D:%.*]], i32 [[SH:%.*]]) { |
| 33 | +; CHECK-NEXT: [[VAL1:%.*]] = call i32 @llvm.fshl.i32(i32 [[A]], i32 [[B]], i32 [[SH]]) |
| 34 | +; CHECK-NEXT: [[VAL2:%.*]] = call i32 @llvm.fshl.i32(i32 [[C]], i32 [[D]], i32 [[SH]]) |
| 35 | +; CHECK-NEXT: [[RET:%.*]] = xor i32 [[VAL1]], [[VAL2]] |
| 36 | +; CHECK-NEXT: ret i32 [[RET]] |
| 37 | +; |
| 38 | + %val1 = call i32 @llvm.fshl.i32(i32 %a, i32 %b, i32 %sh) |
| 39 | + %val2 = call i32 @llvm.fshl.i32(i32 %c, i32 %d, i32 %sh) |
| 40 | + %ret = xor i32 %val1, %val2 |
| 41 | + ret i32 %ret |
| 42 | +} |
| 43 | +define i32 @test_or_fshr(i32 %a, i32 %b, i32 %c, i32 %d, i32 %sh) { |
| 44 | +; CHECK-LABEL: define i32 @test_or_fshr( |
| 45 | +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]], i32 [[D:%.*]], i32 [[SH:%.*]]) { |
| 46 | +; CHECK-NEXT: [[VAL1:%.*]] = call i32 @llvm.fshr.i32(i32 [[A]], i32 [[B]], i32 [[SH]]) |
| 47 | +; CHECK-NEXT: [[VAL2:%.*]] = call i32 @llvm.fshr.i32(i32 [[C]], i32 [[D]], i32 [[SH]]) |
| 48 | +; CHECK-NEXT: [[RET:%.*]] = or i32 [[VAL1]], [[VAL2]] |
| 49 | +; CHECK-NEXT: ret i32 [[RET]] |
| 50 | +; |
| 51 | + %val1 = call i32 @llvm.fshr.i32(i32 %a, i32 %b, i32 %sh) |
| 52 | + %val2 = call i32 @llvm.fshr.i32(i32 %c, i32 %d, i32 %sh) |
| 53 | + %ret = or i32 %val1, %val2 |
| 54 | + ret i32 %ret |
| 55 | +} |
| 56 | +define i32 @test_or_fshl_cascade(i32 %a, i32 %b, i32 %c) { |
| 57 | +; CHECK-LABEL: define i32 @test_or_fshl_cascade( |
| 58 | +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]]) { |
| 59 | +; CHECK-NEXT: [[FSHL1:%.*]] = call i32 @llvm.fshl.i32(i32 [[A]], i32 [[A]], i32 24) |
| 60 | +; CHECK-NEXT: [[FSHL2:%.*]] = call i32 @llvm.fshl.i32(i32 [[B]], i32 [[B]], i32 24) |
| 61 | +; CHECK-NEXT: [[FSHL3:%.*]] = call i32 @llvm.fshl.i32(i32 [[C]], i32 [[C]], i32 24) |
| 62 | +; CHECK-NEXT: [[OR1:%.*]] = or i32 [[FSHL1]], [[FSHL2]] |
| 63 | +; CHECK-NEXT: [[OR2:%.*]] = or i32 [[OR1]], [[FSHL3]] |
| 64 | +; CHECK-NEXT: ret i32 [[OR2]] |
| 65 | +; |
| 66 | + %fshl1 = call i32 @llvm.fshl.i32(i32 %a, i32 %a, i32 24) |
| 67 | + %fshl2 = call i32 @llvm.fshl.i32(i32 %b, i32 %b, i32 24) |
| 68 | + %fshl3 = call i32 @llvm.fshl.i32(i32 %c, i32 %c, i32 24) |
| 69 | + %or1 = or i32 %fshl1, %fshl2 |
| 70 | + %or2 = or i32 %or1, %fshl3 |
| 71 | + ret i32 %or2 |
| 72 | +} |
| 73 | +define i32 @test_or_bitreverse(i32 %a, i32 %b) { |
| 74 | +; CHECK-LABEL: define i32 @test_or_bitreverse( |
| 75 | +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) { |
| 76 | +; CHECK-NEXT: [[VAL1:%.*]] = call i32 @llvm.bitreverse.i32(i32 [[A]]) |
| 77 | +; CHECK-NEXT: [[VAL2:%.*]] = call i32 @llvm.bitreverse.i32(i32 [[B]]) |
| 78 | +; CHECK-NEXT: [[RET:%.*]] = or i32 [[VAL1]], [[VAL2]] |
| 79 | +; CHECK-NEXT: ret i32 [[RET]] |
| 80 | +; |
| 81 | + %val1 = call i32 @llvm.bitreverse.i32(i32 %a) |
| 82 | + %val2 = call i32 @llvm.bitreverse.i32(i32 %b) |
| 83 | + %ret = or i32 %val1, %val2 |
| 84 | + ret i32 %ret |
| 85 | +} |
| 86 | +define i32 @test_or_bitreverse_constant(i32 %a, i32 %b) { |
| 87 | +; CHECK-LABEL: define i32 @test_or_bitreverse_constant( |
| 88 | +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) { |
| 89 | +; CHECK-NEXT: [[VAL1:%.*]] = call i32 @llvm.bitreverse.i32(i32 [[A]]) |
| 90 | +; CHECK-NEXT: [[RET:%.*]] = or i32 [[VAL1]], -16777216 |
| 91 | +; CHECK-NEXT: ret i32 [[RET]] |
| 92 | +; |
| 93 | + %val1 = call i32 @llvm.bitreverse.i32(i32 %a) |
| 94 | + %ret = or i32 %val1, 4278190080 |
| 95 | + ret i32 %ret |
| 96 | +} |
| 97 | +define i32 @test_or_bswap(i32 %a, i32 %b) { |
| 98 | +; CHECK-LABEL: define i32 @test_or_bswap( |
| 99 | +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) { |
| 100 | +; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[A]], [[B]] |
| 101 | +; CHECK-NEXT: [[RET:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP1]]) |
| 102 | +; CHECK-NEXT: ret i32 [[RET]] |
| 103 | +; |
| 104 | + %val1 = call i32 @llvm.bswap.i32(i32 %a) |
| 105 | + %val2 = call i32 @llvm.bswap.i32(i32 %b) |
| 106 | + %ret = or i32 %val1, %val2 |
| 107 | + ret i32 %ret |
| 108 | +} |
| 109 | +define i32 @test_or_bswap_constant(i32 %a, i32 %b) { |
| 110 | +; CHECK-LABEL: define i32 @test_or_bswap_constant( |
| 111 | +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) { |
| 112 | +; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[A]], 255 |
| 113 | +; CHECK-NEXT: [[RET:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP1]]) |
| 114 | +; CHECK-NEXT: ret i32 [[RET]] |
| 115 | +; |
| 116 | + %val1 = call i32 @llvm.bswap.i32(i32 %a) |
| 117 | + %ret = or i32 %val1, 4278190080 |
| 118 | + ret i32 %ret |
| 119 | +} |
| 120 | + |
| 121 | +; Negative tests |
| 122 | + |
| 123 | +define i32 @test_or_fshl_fshr(i32 %a, i32 %b, i32 %c, i32 %d, i32 %sh) { |
| 124 | +; CHECK-LABEL: define i32 @test_or_fshl_fshr( |
| 125 | +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]], i32 [[D:%.*]], i32 [[SH:%.*]]) { |
| 126 | +; CHECK-NEXT: [[VAL1:%.*]] = call i32 @llvm.fshl.i32(i32 [[A]], i32 [[B]], i32 [[SH]]) |
| 127 | +; CHECK-NEXT: [[VAL2:%.*]] = call i32 @llvm.fshr.i32(i32 [[C]], i32 [[D]], i32 [[SH]]) |
| 128 | +; CHECK-NEXT: [[RET:%.*]] = or i32 [[VAL1]], [[VAL2]] |
| 129 | +; CHECK-NEXT: ret i32 [[RET]] |
| 130 | +; |
| 131 | + %val1 = call i32 @llvm.fshl.i32(i32 %a, i32 %b, i32 %sh) |
| 132 | + %val2 = call i32 @llvm.fshr.i32(i32 %c, i32 %d, i32 %sh) |
| 133 | + %ret = or i32 %val1, %val2 |
| 134 | + ret i32 %ret |
| 135 | +} |
| 136 | +define i32 @test_or_bitreverse_bswap(i32 %a, i32 %b) { |
| 137 | +; CHECK-LABEL: define i32 @test_or_bitreverse_bswap( |
| 138 | +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) { |
| 139 | +; CHECK-NEXT: [[VAL1:%.*]] = call i32 @llvm.bitreverse.i32(i32 [[A]]) |
| 140 | +; CHECK-NEXT: [[VAL2:%.*]] = call i32 @llvm.bswap.i32(i32 [[B]]) |
| 141 | +; CHECK-NEXT: [[RET:%.*]] = or i32 [[VAL1]], [[VAL2]] |
| 142 | +; CHECK-NEXT: ret i32 [[RET]] |
| 143 | +; |
| 144 | + %val1 = call i32 @llvm.bitreverse.i32(i32 %a) |
| 145 | + %val2 = call i32 @llvm.bswap.i32(i32 %b) |
| 146 | + %ret = or i32 %val1, %val2 |
| 147 | + ret i32 %ret |
| 148 | +} |
| 149 | +define i32 @test_or_fshl_mismatched_shamt(i32 %a, i32 %b, i32 %c, i32 %d, i32 %sh1, i32 %sh2) { |
| 150 | +; CHECK-LABEL: define i32 @test_or_fshl_mismatched_shamt( |
| 151 | +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]], i32 [[D:%.*]], i32 [[SH1:%.*]], i32 [[SH2:%.*]]) { |
| 152 | +; CHECK-NEXT: [[VAL1:%.*]] = call i32 @llvm.fshl.i32(i32 [[A]], i32 [[B]], i32 [[SH1]]) |
| 153 | +; CHECK-NEXT: [[VAL2:%.*]] = call i32 @llvm.fshl.i32(i32 [[C]], i32 [[D]], i32 [[SH2]]) |
| 154 | +; CHECK-NEXT: [[RET:%.*]] = or i32 [[VAL1]], [[VAL2]] |
| 155 | +; CHECK-NEXT: ret i32 [[RET]] |
| 156 | +; |
| 157 | + %val1 = call i32 @llvm.fshl.i32(i32 %a, i32 %b, i32 %sh1) |
| 158 | + %val2 = call i32 @llvm.fshl.i32(i32 %c, i32 %d, i32 %sh2) |
| 159 | + %ret = or i32 %val1, %val2 |
| 160 | + ret i32 %ret |
| 161 | +} |
| 162 | +define i32 @test_add_fshl(i32 %a, i32 %b, i32 %c, i32 %d, i32 %sh) { |
| 163 | +; CHECK-LABEL: define i32 @test_add_fshl( |
| 164 | +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]], i32 [[D:%.*]], i32 [[SH:%.*]]) { |
| 165 | +; CHECK-NEXT: [[VAL1:%.*]] = call i32 @llvm.fshl.i32(i32 [[A]], i32 [[B]], i32 [[SH]]) |
| 166 | +; CHECK-NEXT: [[VAL2:%.*]] = call i32 @llvm.fshl.i32(i32 [[C]], i32 [[D]], i32 [[SH]]) |
| 167 | +; CHECK-NEXT: [[RET:%.*]] = add i32 [[VAL1]], [[VAL2]] |
| 168 | +; CHECK-NEXT: ret i32 [[RET]] |
| 169 | +; |
| 170 | + %val1 = call i32 @llvm.fshl.i32(i32 %a, i32 %b, i32 %sh) |
| 171 | + %val2 = call i32 @llvm.fshl.i32(i32 %c, i32 %d, i32 %sh) |
| 172 | + %ret = add i32 %val1, %val2 |
| 173 | + ret i32 %ret |
| 174 | +} |
| 175 | +define i32 @test_or_fshl_multiuse(i32 %a, i32 %b, i32 %c, i32 %d, i32 %sh) { |
| 176 | +; CHECK-LABEL: define i32 @test_or_fshl_multiuse( |
| 177 | +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]], i32 [[D:%.*]], i32 [[SH:%.*]]) { |
| 178 | +; CHECK-NEXT: [[VAL1:%.*]] = call i32 @llvm.fshl.i32(i32 [[A]], i32 [[B]], i32 [[SH]]) |
| 179 | +; CHECK-NEXT: call void @use(i32 [[VAL1]]) |
| 180 | +; CHECK-NEXT: [[VAL2:%.*]] = call i32 @llvm.fshl.i32(i32 [[C]], i32 [[D]], i32 [[SH]]) |
| 181 | +; CHECK-NEXT: [[RET:%.*]] = or i32 [[VAL1]], [[VAL2]] |
| 182 | +; CHECK-NEXT: ret i32 [[RET]] |
| 183 | +; |
| 184 | + %val1 = call i32 @llvm.fshl.i32(i32 %a, i32 %b, i32 %sh) |
| 185 | + call void @use(i32 %val1) |
| 186 | + %val2 = call i32 @llvm.fshl.i32(i32 %c, i32 %d, i32 %sh) |
| 187 | + %ret = or i32 %val1, %val2 |
| 188 | + ret i32 %ret |
| 189 | +} |
| 190 | +define i32 @test_or_bitreverse_multiuse(i32 %a, i32 %b) { |
| 191 | +; CHECK-LABEL: define i32 @test_or_bitreverse_multiuse( |
| 192 | +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) { |
| 193 | +; CHECK-NEXT: [[VAL1:%.*]] = call i32 @llvm.bitreverse.i32(i32 [[A]]) |
| 194 | +; CHECK-NEXT: call void @use(i32 [[VAL1]]) |
| 195 | +; CHECK-NEXT: [[VAL2:%.*]] = call i32 @llvm.bitreverse.i32(i32 [[B]]) |
| 196 | +; CHECK-NEXT: [[RET:%.*]] = or i32 [[VAL1]], [[VAL2]] |
| 197 | +; CHECK-NEXT: ret i32 [[RET]] |
| 198 | +; |
| 199 | + %val1 = call i32 @llvm.bitreverse.i32(i32 %a) |
| 200 | + call void @use(i32 %val1) |
| 201 | + %val2 = call i32 @llvm.bitreverse.i32(i32 %b) |
| 202 | + %ret = or i32 %val1, %val2 |
| 203 | + ret i32 %ret |
| 204 | +} |
| 205 | +define i32 @test_or_fshl_constant(i32 %a, i32 %b, i32 %sh) { |
| 206 | +; CHECK-LABEL: define i32 @test_or_fshl_constant( |
| 207 | +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]], i32 [[SH:%.*]]) { |
| 208 | +; CHECK-NEXT: [[VAL1:%.*]] = call i32 @llvm.fshl.i32(i32 [[A]], i32 [[B]], i32 [[SH]]) |
| 209 | +; CHECK-NEXT: [[RET:%.*]] = or i32 [[VAL1]], -16777216 |
| 210 | +; CHECK-NEXT: ret i32 [[RET]] |
| 211 | +; |
| 212 | + %val1 = call i32 @llvm.fshl.i32(i32 %a, i32 %b, i32 %sh) |
| 213 | + %ret = or i32 %val1, 4278190080 |
| 214 | + ret i32 %ret |
| 215 | +} |
| 216 | + |
| 217 | +declare void @use(i32) |
| 218 | +declare i32 @llvm.fshl.i32(i32, i32, i32) |
| 219 | +declare i32 @llvm.fshr.i32(i32, i32, i32) |
| 220 | +declare i32 @llvm.bitreverse.i32(i32) |
| 221 | +declare i32 @llvm.bswap.i32(i32) |
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