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[SLP]Do correct signedness analysis for externally used scalars
If the scalars is used externally is in the root node, it may have incorrect signedness info because of the conflict with the demanded bits analysis. Need to perform exact signedness analysis and compute it rather than rely on the precomputed value, which might be incorrect for alternate zext/sext nodes. Fixes #113520
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3 files changed

+8
-6
lines changed

3 files changed

+8
-6
lines changed

llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -12068,8 +12068,9 @@ InstructionCost BoUpSLP::getTreeCost(ArrayRef<Value *> VectorizedVals) {
1206812068
auto It = MinBWs.find(Entry);
1206912069
if (It != MinBWs.end()) {
1207012070
auto *MinTy = IntegerType::get(F->getContext(), It->second.first);
12071-
unsigned Extend =
12072-
It->second.second ? Instruction::SExt : Instruction::ZExt;
12071+
unsigned Extend = isKnownNonNegative(EU.Scalar, SimplifyQuery(*DL))
12072+
? Instruction::ZExt
12073+
: Instruction::SExt;
1207312074
VecTy = getWidenedType(MinTy, BundleWidth);
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ExtraCost = TTI->getExtractWithExtendCost(Extend, EU.Scalar->getType(),
1207512076
VecTy, EU.Lane);
@@ -15784,8 +15785,9 @@ BoUpSLP::vectorizeTree(const ExtraValueToDebugLocsMap &ExternallyUsedValues,
1578415785
// to the larger type.
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ExV = Ex;
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if (Scalar->getType() != Ex->getType())
15787-
ExV = Builder.CreateIntCast(Ex, Scalar->getType(),
15788-
MinBWs.find(E)->second.second);
15788+
ExV = Builder.CreateIntCast(
15789+
Ex, Scalar->getType(),
15790+
!isKnownNonNegative(Scalar, SimplifyQuery(*DL)));
1578915791
auto *I = dyn_cast<Instruction>(Ex);
1579015792
ScalarToEEs[Scalar].try_emplace(I ? I->getParent()
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: &F->getEntryBlock(),

llvm/test/Transforms/SLPVectorizer/SystemZ/ext-alt-node-must-ext.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@ define i32 @test(ptr %0, ptr %1) {
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; CHECK-NEXT: [[TMP13:%.*]] = extractelement <2 x i8> [[TMP12]], i32 0
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; CHECK-NEXT: [[DOTNEG:%.*]] = sext i8 [[TMP13]] to i32
1919
; CHECK-NEXT: [[TMP15:%.*]] = extractelement <2 x i8> [[TMP12]], i32 1
20-
; CHECK-NEXT: [[TMP8:%.*]] = sext i8 [[TMP15]] to i32
20+
; CHECK-NEXT: [[TMP8:%.*]] = zext i8 [[TMP15]] to i32
2121
; CHECK-NEXT: [[TMP10:%.*]] = add nsw i32 [[DOTNEG]], [[TMP8]]
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; CHECK-NEXT: ret i32 [[TMP10]]
2323
;

llvm/test/Transforms/SLPVectorizer/resized-alt-shuffle-after-minbw.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -80,7 +80,7 @@ define void @func(i32 %0) {
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; CHECK-NEXT: [[TMP75:%.*]] = extractelement <32 x i1> [[TMP20]], i32 4
8181
; CHECK-NEXT: [[TMP76:%.*]] = and i1 false, [[TMP75]]
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; CHECK-NEXT: [[TMP77:%.*]] = extractelement <32 x i32> [[TMP18]], i32 0
83-
; CHECK-NEXT: [[TMP78:%.*]] = sext i32 [[TMP77]] to i64
83+
; CHECK-NEXT: [[TMP78:%.*]] = zext i32 [[TMP77]] to i64
8484
; CHECK-NEXT: [[TMP79:%.*]] = getelementptr float, ptr addrspace(1) null, i64 [[TMP78]]
8585
; CHECK-NEXT: ret void
8686
;

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