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[LV,RISCV] Regenerate a test to reduce spurious deltas in upcoming change
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‎llvm/test/Transforms/LoopVectorize/RISCV/short-trip-count.ll

Lines changed: 24 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -8,23 +8,23 @@ define void @small_trip_count_min_vlen_128(ptr nocapture %a) nounwind vscale_ran
88
; CHECK: vector.ph:
99
; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.vscale.i32()
1010
; CHECK-NEXT: [[TMP1:%.*]] = mul i32 [[TMP0]], 2
11-
; CHECK-NEXT: [[TMP4:%.*]] = sub i32 [[TMP1]], 1
12-
; CHECK-NEXT: [[N_RND_UP:%.*]] = add i32 4, [[TMP4]]
11+
; CHECK-NEXT: [[TMP2:%.*]] = sub i32 [[TMP1]], 1
12+
; CHECK-NEXT: [[N_RND_UP:%.*]] = add i32 4, [[TMP2]]
1313
; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[N_RND_UP]], [[TMP1]]
1414
; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[N_RND_UP]], [[N_MOD_VF]]
15-
; CHECK-NEXT: [[TMP5:%.*]] = call i32 @llvm.vscale.i32()
16-
; CHECK-NEXT: [[TMP6:%.*]] = mul i32 [[TMP5]], 2
15+
; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.vscale.i32()
16+
; CHECK-NEXT: [[TMP4:%.*]] = mul i32 [[TMP3]], 2
1717
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
1818
; CHECK: vector.body:
1919
; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
20-
; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[INDEX]], 0
21-
; CHECK-NEXT: [[ACTIVE_LANE_MASK:%.*]] = call <vscale x 2 x i1> @llvm.get.active.lane.mask.nxv2i1.i32(i32 [[TMP7]], i32 4)
22-
; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i32 [[TMP7]]
23-
; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, ptr [[TMP8]], i32 0
24-
; CHECK-NEXT: [[WIDE_MASKED_LOAD:%.*]] = call <vscale x 2 x i32> @llvm.masked.load.nxv2i32.p0(ptr [[TMP9]], i32 4, <vscale x 2 x i1> [[ACTIVE_LANE_MASK]], <vscale x 2 x i32> poison)
25-
; CHECK-NEXT: [[TMP10:%.*]] = add nsw <vscale x 2 x i32> [[WIDE_MASKED_LOAD]], shufflevector (<vscale x 2 x i32> insertelement (<vscale x 2 x i32> poison, i32 1, i64 0), <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer)
26-
; CHECK-NEXT: call void @llvm.masked.store.nxv2i32.p0(<vscale x 2 x i32> [[TMP10]], ptr [[TMP9]], i32 4, <vscale x 2 x i1> [[ACTIVE_LANE_MASK]])
27-
; CHECK-NEXT: [[INDEX_NEXT]] = add i32 [[INDEX]], [[TMP6]]
20+
; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[INDEX]], 0
21+
; CHECK-NEXT: [[ACTIVE_LANE_MASK:%.*]] = call <vscale x 2 x i1> @llvm.get.active.lane.mask.nxv2i1.i32(i32 [[TMP5]], i32 4)
22+
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i32 [[TMP5]]
23+
; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i32, ptr [[TMP6]], i32 0
24+
; CHECK-NEXT: [[WIDE_MASKED_LOAD:%.*]] = call <vscale x 2 x i32> @llvm.masked.load.nxv2i32.p0(ptr [[TMP7]], i32 4, <vscale x 2 x i1> [[ACTIVE_LANE_MASK]], <vscale x 2 x i32> poison)
25+
; CHECK-NEXT: [[TMP8:%.*]] = add nsw <vscale x 2 x i32> [[WIDE_MASKED_LOAD]], shufflevector (<vscale x 2 x i32> insertelement (<vscale x 2 x i32> poison, i32 1, i64 0), <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer)
26+
; CHECK-NEXT: call void @llvm.masked.store.nxv2i32.p0(<vscale x 2 x i32> [[TMP8]], ptr [[TMP7]], i32 4, <vscale x 2 x i1> [[ACTIVE_LANE_MASK]])
27+
; CHECK-NEXT: [[INDEX_NEXT]] = add i32 [[INDEX]], [[TMP4]]
2828
; CHECK-NEXT: br i1 true, label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
2929
; CHECK: middle.block:
3030
; CHECK-NEXT: br i1 true, label [[EXIT:%.*]], label [[SCALAR_PH]]
@@ -67,23 +67,23 @@ define void @small_trip_count_min_vlen_32(ptr nocapture %a) nounwind vscale_rang
6767
; CHECK: vector.ph:
6868
; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.vscale.i32()
6969
; CHECK-NEXT: [[TMP1:%.*]] = mul i32 [[TMP0]], 4
70-
; CHECK-NEXT: [[TMP4:%.*]] = sub i32 [[TMP1]], 1
71-
; CHECK-NEXT: [[N_RND_UP:%.*]] = add i32 4, [[TMP4]]
70+
; CHECK-NEXT: [[TMP2:%.*]] = sub i32 [[TMP1]], 1
71+
; CHECK-NEXT: [[N_RND_UP:%.*]] = add i32 4, [[TMP2]]
7272
; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[N_RND_UP]], [[TMP1]]
7373
; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[N_RND_UP]], [[N_MOD_VF]]
74-
; CHECK-NEXT: [[TMP5:%.*]] = call i32 @llvm.vscale.i32()
75-
; CHECK-NEXT: [[TMP6:%.*]] = mul i32 [[TMP5]], 4
74+
; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.vscale.i32()
75+
; CHECK-NEXT: [[TMP4:%.*]] = mul i32 [[TMP3]], 4
7676
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
7777
; CHECK: vector.body:
7878
; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
79-
; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[INDEX]], 0
80-
; CHECK-NEXT: [[ACTIVE_LANE_MASK:%.*]] = call <vscale x 4 x i1> @llvm.get.active.lane.mask.nxv4i1.i32(i32 [[TMP7]], i32 4)
81-
; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i32 [[TMP7]]
82-
; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, ptr [[TMP8]], i32 0
83-
; CHECK-NEXT: [[WIDE_MASKED_LOAD:%.*]] = call <vscale x 4 x i32> @llvm.masked.load.nxv4i32.p0(ptr [[TMP9]], i32 4, <vscale x 4 x i1> [[ACTIVE_LANE_MASK]], <vscale x 4 x i32> poison)
84-
; CHECK-NEXT: [[TMP10:%.*]] = add nsw <vscale x 4 x i32> [[WIDE_MASKED_LOAD]], shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer)
85-
; CHECK-NEXT: call void @llvm.masked.store.nxv4i32.p0(<vscale x 4 x i32> [[TMP10]], ptr [[TMP9]], i32 4, <vscale x 4 x i1> [[ACTIVE_LANE_MASK]])
86-
; CHECK-NEXT: [[INDEX_NEXT]] = add i32 [[INDEX]], [[TMP6]]
79+
; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[INDEX]], 0
80+
; CHECK-NEXT: [[ACTIVE_LANE_MASK:%.*]] = call <vscale x 4 x i1> @llvm.get.active.lane.mask.nxv4i1.i32(i32 [[TMP5]], i32 4)
81+
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i32 [[TMP5]]
82+
; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i32, ptr [[TMP6]], i32 0
83+
; CHECK-NEXT: [[WIDE_MASKED_LOAD:%.*]] = call <vscale x 4 x i32> @llvm.masked.load.nxv4i32.p0(ptr [[TMP7]], i32 4, <vscale x 4 x i1> [[ACTIVE_LANE_MASK]], <vscale x 4 x i32> poison)
84+
; CHECK-NEXT: [[TMP8:%.*]] = add nsw <vscale x 4 x i32> [[WIDE_MASKED_LOAD]], shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer)
85+
; CHECK-NEXT: call void @llvm.masked.store.nxv4i32.p0(<vscale x 4 x i32> [[TMP8]], ptr [[TMP7]], i32 4, <vscale x 4 x i1> [[ACTIVE_LANE_MASK]])
86+
; CHECK-NEXT: [[INDEX_NEXT]] = add i32 [[INDEX]], [[TMP4]]
8787
; CHECK-NEXT: br i1 true, label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
8888
; CHECK: middle.block:
8989
; CHECK-NEXT: br i1 true, label [[EXIT:%.*]], label [[SCALAR_PH]]

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