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[InstSimplify] Remove most of undef handling logic
1 parent b26fe5b commit ea83480

16 files changed

+132
-248
lines changed

‎llvm/lib/Analysis/InstructionSimplify.cpp

Lines changed: 9 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -748,11 +748,6 @@ static Value *simplifySubInst(Value *Op0, Value *Op1, bool IsNSW, bool IsNUW,
748748
if (isa<PoisonValue>(Op0) || isa<PoisonValue>(Op1))
749749
return PoisonValue::get(Op0->getType());
750750

751-
// X - undef -> undef
752-
// undef - X -> undef
753-
if (Q.isUndefValue(Op0) || Q.isUndefValue(Op1))
754-
return UndefValue::get(Op0->getType());
755-
756751
// X - 0 -> X
757752
if (match(Op1, m_Zero()))
758753
return Op0;
@@ -3742,15 +3737,8 @@ static Value *simplifyICmpInst(CmpPredicate Pred, Value *LHS, Value *RHS,
37423737
if (isa<PoisonValue>(RHS))
37433738
return PoisonValue::get(ITy);
37443739

3745-
// For EQ and NE, we can always pick a value for the undef to make the
3746-
// predicate pass or fail, so we can return undef.
3747-
// Matches behavior in llvm::ConstantFoldCompareInstruction.
3748-
if (Q.isUndefValue(RHS) && ICmpInst::isEquality(Pred))
3749-
return UndefValue::get(ITy);
3750-
37513740
// icmp X, X -> true/false
3752-
// icmp X, undef -> true/false because undef could be X.
3753-
if (LHS == RHS || Q.isUndefValue(RHS))
3741+
if (LHS == RHS)
37543742
return ConstantInt::get(ITy, CmpInst::isTrueWhenEqual(Pred));
37553743

37563744
if (Value *V = simplifyICmpOfBools(Pred, LHS, RHS, Q))
@@ -5002,10 +4990,6 @@ static Value *simplifyGEPInst(Type *SrcTy, Value *Ptr,
50024990
any_of(Indices, [](const auto *V) { return isa<PoisonValue>(V); }))
50034991
return PoisonValue::get(GEPTy);
50044992

5005-
// getelementptr undef, idx -> undef
5006-
if (Q.isUndefValue(Ptr))
5007-
return UndefValue::get(GEPTy);
5008-
50094993
bool IsScalableVec =
50104994
SrcTy->isScalableTy() || any_of(Indices, [](const Value *V) {
50114995
return isa<ScalableVectorType>(V->getType());
@@ -5223,13 +5207,13 @@ static Value *simplifyExtractElementInst(Value *Vec, Value *Idx,
52235207
if (auto *CIdx = dyn_cast<Constant>(Idx))
52245208
return ConstantExpr::getExtractElement(CVec, CIdx);
52255209

5226-
if (Q.isUndefValue(Vec))
5227-
return UndefValue::get(VecVTy->getElementType());
5210+
if (isa<PoisonValue>(Vec))
5211+
return PoisonValue::get(VecVTy->getElementType());
52285212
}
52295213

5230-
// An undef extract index can be arbitrarily chosen to be an out-of-range
5214+
// A poison extract index can be arbitrarily chosen to be an out-of-range
52315215
// index value, which would result in the instruction being poison.
5232-
if (Q.isUndefValue(Idx))
5216+
if (isa<PoisonValue>(Idx))
52335217
return PoisonValue::get(VecVTy->getElementType());
52345218

52355219
// If extracting a specified index from the vector, see if we can recursively
@@ -6673,8 +6657,6 @@ Value *llvm::simplifyBinaryIntrinsic(Intrinsic::ID IID, Type *ReturnType,
66736657
return ConstantInt::get(ReturnType, true);
66746658
if ((Mask & fcAllFlags) == 0)
66756659
return ConstantInt::get(ReturnType, false);
6676-
if (Q.isUndefValue(Op0))
6677-
return UndefValue::get(ReturnType);
66786660
break;
66796661
}
66806662
case Intrinsic::maxnum:
@@ -6799,13 +6781,10 @@ static Value *simplifyIntrinsic(CallBase *Call, Value *Callee,
67996781
case Intrinsic::fshr: {
68006782
Value *Op0 = Args[0], *Op1 = Args[1], *ShAmtArg = Args[2];
68016783

6802-
// If both operands are undef, the result is undef.
6803-
if (Q.isUndefValue(Op0) && Q.isUndefValue(Op1))
6804-
return UndefValue::get(F->getReturnType());
6805-
6806-
// If shift amount is undef, assume it is zero.
6807-
if (Q.isUndefValue(ShAmtArg))
6808-
return Args[IID == Intrinsic::fshl ? 0 : 1];
6784+
// If any of the operands is poison, the result is poison.
6785+
if (isa<PoisonValue>(Op0) || isa<PoisonValue>(Op1) ||
6786+
isa<PoisonValue>(ShAmtArg))
6787+
return PoisonValue::get(F->getReturnType());
68096788

68106789
const APInt *ShAmtC;
68116790
if (match(ShAmtArg, m_APInt(ShAmtC))) {

‎llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -154,7 +154,7 @@ define amdgpu_kernel void @nested_loop_conditions(ptr addrspace(1) nocapture %ar
154154
; GCN-NEXT: v_cmp_lt_i32_e32 vcc, 8, v0
155155
; GCN-NEXT: s_cbranch_vccnz .LBB1_6
156156
; GCN-NEXT: ; %bb.1: ; %bb14.lr.ph
157-
; GCN-NEXT: s_load_dword s4, s[0:1], 0x0
157+
; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x0
158158
; GCN-NEXT: s_branch .LBB1_3
159159
; GCN-NEXT: .LBB1_2: ; %Flow
160160
; GCN-NEXT: ; in Loop: Header=BB1_3 Depth=1
@@ -179,7 +179,7 @@ define amdgpu_kernel void @nested_loop_conditions(ptr addrspace(1) nocapture %ar
179179
; GCN-NEXT: s_cbranch_vccnz .LBB1_4
180180
; GCN-NEXT: ; %bb.5: ; %bb21
181181
; GCN-NEXT: ; in Loop: Header=BB1_3 Depth=1
182-
; GCN-NEXT: s_load_dword s4, s[0:1], 0x0
182+
; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x0
183183
; GCN-NEXT: buffer_load_dword v0, off, s[0:3], 0 glc
184184
; GCN-NEXT: s_waitcnt vmcnt(0)
185185
; GCN-NEXT: v_cmp_lt_i32_e64 s[0:1], 8, v0

‎llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll

Lines changed: 26 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -66,7 +66,7 @@ define double @test_constant_fold_rcp_f64_43() nounwind {
6666

6767
define float @test_constant_fold_rcp_f32_43_strictfp() nounwind strictfp {
6868
; CHECK-LABEL: @test_constant_fold_rcp_f32_43_strictfp(
69-
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.rcp.f32(float 4.300000e+01) #[[ATTR14:[0-9]+]]
69+
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.rcp.f32(float 4.300000e+01) #[[ATTR15:[0-9]+]]
7070
; CHECK-NEXT: ret float [[VAL]]
7171
;
7272
%val = call float @llvm.amdgcn.rcp.f32(float 4.300000e+01) strictfp nounwind readnone
@@ -115,7 +115,7 @@ define half @test_constant_fold_sqrt_f16_0() nounwind {
115115

116116
define float @test_constant_fold_sqrt_f32_0() nounwind {
117117
; CHECK-LABEL: @test_constant_fold_sqrt_f32_0(
118-
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.sqrt.f32(float 0.000000e+00) #[[ATTR15:[0-9]+]]
118+
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.sqrt.f32(float 0.000000e+00) #[[ATTR16:[0-9]+]]
119119
; CHECK-NEXT: ret float [[VAL]]
120120
;
121121
%val = call float @llvm.amdgcn.sqrt.f32(float 0.0) nounwind readnone
@@ -124,7 +124,7 @@ define float @test_constant_fold_sqrt_f32_0() nounwind {
124124

125125
define double @test_constant_fold_sqrt_f64_0() nounwind {
126126
; CHECK-LABEL: @test_constant_fold_sqrt_f64_0(
127-
; CHECK-NEXT: [[VAL:%.*]] = call double @llvm.amdgcn.sqrt.f64(double 0.000000e+00) #[[ATTR15]]
127+
; CHECK-NEXT: [[VAL:%.*]] = call double @llvm.amdgcn.sqrt.f64(double 0.000000e+00) #[[ATTR16]]
128128
; CHECK-NEXT: ret double [[VAL]]
129129
;
130130
%val = call double @llvm.amdgcn.sqrt.f64(double 0.0) nounwind readnone
@@ -141,7 +141,7 @@ define half @test_constant_fold_sqrt_f16_neg0() nounwind {
141141

142142
define float @test_constant_fold_sqrt_f32_neg0() nounwind {
143143
; CHECK-LABEL: @test_constant_fold_sqrt_f32_neg0(
144-
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.sqrt.f32(float -0.000000e+00) #[[ATTR15]]
144+
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.sqrt.f32(float -0.000000e+00) #[[ATTR16]]
145145
; CHECK-NEXT: ret float [[VAL]]
146146
;
147147
%val = call float @llvm.amdgcn.sqrt.f32(float -0.0) nounwind readnone
@@ -150,7 +150,7 @@ define float @test_constant_fold_sqrt_f32_neg0() nounwind {
150150

151151
define double @test_constant_fold_sqrt_f64_neg0() nounwind {
152152
; CHECK-LABEL: @test_constant_fold_sqrt_f64_neg0(
153-
; CHECK-NEXT: [[VAL:%.*]] = call double @llvm.amdgcn.sqrt.f64(double -0.000000e+00) #[[ATTR15]]
153+
; CHECK-NEXT: [[VAL:%.*]] = call double @llvm.amdgcn.sqrt.f64(double -0.000000e+00) #[[ATTR16]]
154154
; CHECK-NEXT: ret double [[VAL]]
155155
;
156156
%val = call double @llvm.amdgcn.sqrt.f64(double -0.0) nounwind readnone
@@ -667,7 +667,7 @@ define i1 @test_class_undef_full_mask_f32() nounwind {
667667

668668
define i1 @test_class_undef_val_f32() nounwind {
669669
; CHECK-LABEL: @test_class_undef_val_f32(
670-
; CHECK-NEXT: ret i1 undef
670+
; CHECK-NEXT: ret i1 false
671671
;
672672
%val = call i1 @llvm.amdgcn.class.f32(float undef, i32 4)
673673
ret i1 %val
@@ -718,7 +718,7 @@ define i1 @test_class_isnan_f32(float %x) nounwind {
718718

719719
define i1 @test_class_isnan_f32_strict(float %x) nounwind strictfp {
720720
; CHECK-LABEL: @test_class_isnan_f32_strict(
721-
; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 3) #[[ATTR16:[0-9]+]]
721+
; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 3) #[[ATTR17:[0-9]+]]
722722
; CHECK-NEXT: ret i1 [[VAL]]
723723
;
724724
%val = call i1 @llvm.amdgcn.class.f32(float %x, i32 3) strictfp
@@ -736,7 +736,7 @@ define i1 @test_class_is_p0_n0_f32(float %x) nounwind {
736736

737737
define i1 @test_class_is_p0_n0_f32_strict(float %x) nounwind strictfp {
738738
; CHECK-LABEL: @test_class_is_p0_n0_f32_strict(
739-
; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 96) #[[ATTR16]]
739+
; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 96) #[[ATTR17]]
740740
; CHECK-NEXT: ret i1 [[VAL]]
741741
;
742742
%val = call i1 @llvm.amdgcn.class.f32(float %x, i32 96) strictfp
@@ -2000,7 +2000,7 @@ define i64 @icmp_constant_inputs_false() {
20002000

20012001
define i64 @icmp_constant_inputs_true() {
20022002
; CHECK-LABEL: @icmp_constant_inputs_true(
2003-
; CHECK-NEXT: [[RESULT:%.*]] = call i64 @llvm.read_register.i64(metadata [[META0:![0-9]+]]) #[[ATTR17:[0-9]+]]
2003+
; CHECK-NEXT: [[RESULT:%.*]] = call i64 @llvm.read_register.i64(metadata [[META0:![0-9]+]]) #[[ATTR18:[0-9]+]]
20042004
; CHECK-NEXT: ret i64 [[RESULT]]
20052005
;
20062006
%result = call i64 @llvm.amdgcn.icmp.i64.i32(i32 9, i32 8, i32 34)
@@ -2707,7 +2707,7 @@ define i64 @fcmp_constant_inputs_false() {
27072707

27082708
define i64 @fcmp_constant_inputs_true() {
27092709
; CHECK-LABEL: @fcmp_constant_inputs_true(
2710-
; CHECK-NEXT: [[RESULT:%.*]] = call i64 @llvm.read_register.i64(metadata [[META0]]) #[[ATTR17]]
2710+
; CHECK-NEXT: [[RESULT:%.*]] = call i64 @llvm.read_register.i64(metadata [[META0]]) #[[ATTR18]]
27112711
; CHECK-NEXT: ret i64 [[RESULT]]
27122712
;
27132713
%result = call i64 @llvm.amdgcn.fcmp.i64.f32(float 2.0, float 4.0, i32 4)
@@ -5829,7 +5829,7 @@ define double @trig_preop_constfold_neg32_segment() {
58295829

58305830
define double @trig_preop_constfold_strictfp() strictfp {
58315831
; CHECK-LABEL: @trig_preop_constfold_strictfp(
5832-
; CHECK-NEXT: [[VAL:%.*]] = call double @llvm.amdgcn.trig.preop.f64(double 3.454350e+02, i32 5) #[[ATTR16]]
5832+
; CHECK-NEXT: [[VAL:%.*]] = call double @llvm.amdgcn.trig.preop.f64(double 3.454350e+02, i32 5) #[[ATTR17]]
58335833
; CHECK-NEXT: ret double [[VAL]]
58345834
;
58355835
%val = call double @llvm.amdgcn.trig.preop.f64(double 3.454350e+02, i32 5) strictfp
@@ -6198,7 +6198,7 @@ define half @test_constant_fold_log_f16_neg10() {
61986198

61996199
define float @test_constant_fold_log_f32_qnan_strictfp() strictfp {
62006200
; CHECK-LABEL: @test_constant_fold_log_f32_qnan_strictfp(
6201-
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.log.f32(float 0x7FF8000000000000) #[[ATTR16]]
6201+
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.log.f32(float 0x7FF8000000000000) #[[ATTR17]]
62026202
; CHECK-NEXT: ret float [[VAL]]
62036203
;
62046204
%val = call float @llvm.amdgcn.log.f32(float 0x7FF8000000000000) strictfp
@@ -6207,7 +6207,7 @@ define float @test_constant_fold_log_f32_qnan_strictfp() strictfp {
62076207

62086208
define float @test_constant_fold_log_f32_0_strictfp() strictfp {
62096209
; CHECK-LABEL: @test_constant_fold_log_f32_0_strictfp(
6210-
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.log.f32(float 0.000000e+00) #[[ATTR16]]
6210+
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.log.f32(float 0.000000e+00) #[[ATTR17]]
62116211
; CHECK-NEXT: ret float [[VAL]]
62126212
;
62136213
%val = call float @llvm.amdgcn.log.f32(float 0.0) strictfp
@@ -6216,7 +6216,7 @@ define float @test_constant_fold_log_f32_0_strictfp() strictfp {
62166216

62176217
define float @test_constant_fold_log_f32_neg0_strictfp() strictfp {
62186218
; CHECK-LABEL: @test_constant_fold_log_f32_neg0_strictfp(
6219-
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.log.f32(float -0.000000e+00) #[[ATTR16]]
6219+
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.log.f32(float -0.000000e+00) #[[ATTR17]]
62206220
; CHECK-NEXT: ret float [[VAL]]
62216221
;
62226222
%val = call float @llvm.amdgcn.log.f32(float -0.0) strictfp
@@ -6225,7 +6225,7 @@ define float @test_constant_fold_log_f32_neg0_strictfp() strictfp {
62256225

62266226
define float @test_constant_fold_log_f32_neg_strictfp() strictfp {
62276227
; CHECK-LABEL: @test_constant_fold_log_f32_neg_strictfp(
6228-
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.log.f32(float -1.000000e+01) #[[ATTR16]]
6228+
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.log.f32(float -1.000000e+01) #[[ATTR17]]
62296229
; CHECK-NEXT: ret float [[VAL]]
62306230
;
62316231
%val = call float @llvm.amdgcn.log.f32(float -10.0) strictfp
@@ -6242,7 +6242,7 @@ define float @test_constant_fold_log_f32_pinf_strictfp() strictfp {
62426242

62436243
define float @test_constant_fold_log_f32_ninf_strictfp() strictfp {
62446244
; CHECK-LABEL: @test_constant_fold_log_f32_ninf_strictfp(
6245-
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.log.f32(float 0xFFF0000000000000) #[[ATTR16]]
6245+
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.log.f32(float 0xFFF0000000000000) #[[ATTR17]]
62466246
; CHECK-NEXT: ret float [[VAL]]
62476247
;
62486248
%val = call float @llvm.amdgcn.log.f32(float 0xFFF0000000000000) strictfp
@@ -6444,7 +6444,7 @@ define half @test_constant_fold_exp2_f16_neg10() {
64446444

64456445
define float @test_constant_fold_exp2_f32_qnan_strictfp() strictfp {
64466446
; CHECK-LABEL: @test_constant_fold_exp2_f32_qnan_strictfp(
6447-
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float 0x7FF8000000000000) #[[ATTR16]]
6447+
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float 0x7FF8000000000000) #[[ATTR17]]
64486448
; CHECK-NEXT: ret float [[VAL]]
64496449
;
64506450
%val = call float @llvm.amdgcn.exp2.f32(float 0x7FF8000000000000) strictfp
@@ -6453,7 +6453,7 @@ define float @test_constant_fold_exp2_f32_qnan_strictfp() strictfp {
64536453

64546454
define float @test_constant_fold_exp2_f32_0_strictfp() strictfp {
64556455
; CHECK-LABEL: @test_constant_fold_exp2_f32_0_strictfp(
6456-
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float 0.000000e+00) #[[ATTR16]]
6456+
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float 0.000000e+00) #[[ATTR17]]
64576457
; CHECK-NEXT: ret float [[VAL]]
64586458
;
64596459
%val = call float @llvm.amdgcn.exp2.f32(float 0.0) strictfp
@@ -6462,7 +6462,7 @@ define float @test_constant_fold_exp2_f32_0_strictfp() strictfp {
64626462

64636463
define float @test_constant_fold_exp2_f32_neg0_strictfp() strictfp {
64646464
; CHECK-LABEL: @test_constant_fold_exp2_f32_neg0_strictfp(
6465-
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float -0.000000e+00) #[[ATTR16]]
6465+
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float -0.000000e+00) #[[ATTR17]]
64666466
; CHECK-NEXT: ret float [[VAL]]
64676467
;
64686468
%val = call float @llvm.amdgcn.exp2.f32(float -0.0) strictfp
@@ -6471,7 +6471,7 @@ define float @test_constant_fold_exp2_f32_neg0_strictfp() strictfp {
64716471

64726472
define float @test_constant_fold_exp2_f32_1_strictfp() strictfp {
64736473
; CHECK-LABEL: @test_constant_fold_exp2_f32_1_strictfp(
6474-
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float 1.000000e+00) #[[ATTR16]]
6474+
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float 1.000000e+00) #[[ATTR17]]
64756475
; CHECK-NEXT: ret float [[VAL]]
64766476
;
64776477
%val = call float @llvm.amdgcn.exp2.f32(float 1.0) strictfp
@@ -6480,7 +6480,7 @@ define float @test_constant_fold_exp2_f32_1_strictfp() strictfp {
64806480

64816481
define float @test_constant_fold_exp2_f32_neg1_strictfp() strictfp {
64826482
; CHECK-LABEL: @test_constant_fold_exp2_f32_neg1_strictfp(
6483-
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float -1.000000e+00) #[[ATTR16]]
6483+
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float -1.000000e+00) #[[ATTR17]]
64846484
; CHECK-NEXT: ret float [[VAL]]
64856485
;
64866486
%val = call float @llvm.amdgcn.exp2.f32(float -1.0) strictfp
@@ -6489,7 +6489,7 @@ define float @test_constant_fold_exp2_f32_neg1_strictfp() strictfp {
64896489

64906490
define float @test_constant_fold_exp2_f32_2_strictfp() strictfp {
64916491
; CHECK-LABEL: @test_constant_fold_exp2_f32_2_strictfp(
6492-
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float 2.000000e+00) #[[ATTR16]]
6492+
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float 2.000000e+00) #[[ATTR17]]
64936493
; CHECK-NEXT: ret float [[VAL]]
64946494
;
64956495
%val = call float @llvm.amdgcn.exp2.f32(float 2.0) strictfp
@@ -6498,7 +6498,7 @@ define float @test_constant_fold_exp2_f32_2_strictfp() strictfp {
64986498

64996499
define float @test_constant_fold_exp2_f32_neg2_strictfp() strictfp {
65006500
; CHECK-LABEL: @test_constant_fold_exp2_f32_neg2_strictfp(
6501-
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float -2.000000e+00) #[[ATTR16]]
6501+
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float -2.000000e+00) #[[ATTR17]]
65026502
; CHECK-NEXT: ret float [[VAL]]
65036503
;
65046504
%val = call float @llvm.amdgcn.exp2.f32(float -2.0) strictfp
@@ -6507,7 +6507,7 @@ define float @test_constant_fold_exp2_f32_neg2_strictfp() strictfp {
65076507

65086508
define float @test_constant_fold_exp2_f32_neg_strictfp() strictfp {
65096509
; CHECK-LABEL: @test_constant_fold_exp2_f32_neg_strictfp(
6510-
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float -1.000000e+01) #[[ATTR16]]
6510+
; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.exp2.f32(float -1.000000e+01) #[[ATTR17]]
65116511
; CHECK-NEXT: ret float [[VAL]]
65126512
;
65136513
%val = call float @llvm.amdgcn.exp2.f32(float -10.0) strictfp
@@ -6555,13 +6555,15 @@ declare i32 @llvm.amdgcn.prng.b32(i32)
65556555
define i32 @prng_undef_i32() {
65566556
; CHECK-LABEL: @prng_undef_i32(
65576557
; CHECK-NEXT: ret i32 undef
6558+
;
65586559
%prng = call i32 @llvm.amdgcn.prng.b32(i32 undef)
65596560
ret i32 %prng
65606561
}
65616562

65626563
define i32 @prng_poison_i32() {
65636564
; CHECK-LABEL: @prng_poison_i32(
65646565
; CHECK-NEXT: ret i32 poison
6566+
;
65656567
%prng = call i32 @llvm.amdgcn.prng.b32(i32 poison)
65666568
ret i32 %prng
65676569
}

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