Skip to content

Commit eb523a4

Browse files
RKSimonRKSimon
committed
[X86] vec_extract - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
1 parent ba4cf31 commit eb523a4

File tree

4 files changed

+162
-162
lines changed

4 files changed

+162
-162
lines changed

‎llvm/test/CodeGen/X86/vec_extract-avx.ll

Lines changed: 61 additions & 61 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X32
2+
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X86
33
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X64
44

55
; When extracting multiple consecutive elements from a larger
@@ -9,12 +9,12 @@
99

1010
; Extracting the low elements only requires using the right kind of store.
1111
define void @low_v8f32_to_v4f32(<8 x float> %v, ptr %ptr) {
12-
; X32-LABEL: low_v8f32_to_v4f32:
13-
; X32: # %bb.0:
14-
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
15-
; X32-NEXT: vmovaps %xmm0, (%eax)
16-
; X32-NEXT: vzeroupper
17-
; X32-NEXT: retl
12+
; X86-LABEL: low_v8f32_to_v4f32:
13+
; X86: # %bb.0:
14+
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
15+
; X86-NEXT: vmovaps %xmm0, (%eax)
16+
; X86-NEXT: vzeroupper
17+
; X86-NEXT: retl
1818
;
1919
; X64-LABEL: low_v8f32_to_v4f32:
2020
; X64: # %bb.0:
@@ -35,12 +35,12 @@ define void @low_v8f32_to_v4f32(<8 x float> %v, ptr %ptr) {
3535

3636
; Extracting the high elements requires just one AVX instruction.
3737
define void @high_v8f32_to_v4f32(<8 x float> %v, ptr %ptr) {
38-
; X32-LABEL: high_v8f32_to_v4f32:
39-
; X32: # %bb.0:
40-
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
41-
; X32-NEXT: vextractf128 $1, %ymm0, (%eax)
42-
; X32-NEXT: vzeroupper
43-
; X32-NEXT: retl
38+
; X86-LABEL: high_v8f32_to_v4f32:
39+
; X86: # %bb.0:
40+
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
41+
; X86-NEXT: vextractf128 $1, %ymm0, (%eax)
42+
; X86-NEXT: vzeroupper
43+
; X86-NEXT: retl
4444
;
4545
; X64-LABEL: high_v8f32_to_v4f32:
4646
; X64: # %bb.0:
@@ -63,12 +63,12 @@ define void @high_v8f32_to_v4f32(<8 x float> %v, ptr %ptr) {
6363
; if we were actually using the vector in this function and
6464
; have AVX2, we should generate vextracti128 (the int version).
6565
define void @high_v8i32_to_v4i32(<8 x i32> %v, ptr %ptr) {
66-
; X32-LABEL: high_v8i32_to_v4i32:
67-
; X32: # %bb.0:
68-
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
69-
; X32-NEXT: vextractf128 $1, %ymm0, (%eax)
70-
; X32-NEXT: vzeroupper
71-
; X32-NEXT: retl
66+
; X86-LABEL: high_v8i32_to_v4i32:
67+
; X86: # %bb.0:
68+
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
69+
; X86-NEXT: vextractf128 $1, %ymm0, (%eax)
70+
; X86-NEXT: vzeroupper
71+
; X86-NEXT: retl
7272
;
7373
; X64-LABEL: high_v8i32_to_v4i32:
7474
; X64: # %bb.0:
@@ -89,12 +89,12 @@ define void @high_v8i32_to_v4i32(<8 x i32> %v, ptr %ptr) {
8989

9090
; Make sure that element size doesn't alter the codegen.
9191
define void @high_v4f64_to_v2f64(<4 x double> %v, ptr %ptr) {
92-
; X32-LABEL: high_v4f64_to_v2f64:
93-
; X32: # %bb.0:
94-
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
95-
; X32-NEXT: vextractf128 $1, %ymm0, (%eax)
96-
; X32-NEXT: vzeroupper
97-
; X32-NEXT: retl
92+
; X86-LABEL: high_v4f64_to_v2f64:
93+
; X86: # %bb.0:
94+
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
95+
; X86-NEXT: vextractf128 $1, %ymm0, (%eax)
96+
; X86-NEXT: vzeroupper
97+
; X86-NEXT: retl
9898
;
9999
; X64-LABEL: high_v4f64_to_v2f64:
100100
; X64: # %bb.0:
@@ -113,16 +113,16 @@ define void @high_v4f64_to_v2f64(<4 x double> %v, ptr %ptr) {
113113
; FIXME - Ideally these should just call VMOVD/VMOVQ/VMOVSS/VMOVSD
114114

115115
define void @legal_vzmovl_2i32_8i32(ptr %in, ptr %out) {
116-
; X32-LABEL: legal_vzmovl_2i32_8i32:
117-
; X32: # %bb.0:
118-
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
119-
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
120-
; X32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
121-
; X32-NEXT: vxorps %xmm1, %xmm1, %xmm1
122-
; X32-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
123-
; X32-NEXT: vmovaps %ymm0, (%eax)
124-
; X32-NEXT: vzeroupper
125-
; X32-NEXT: retl
116+
; X86-LABEL: legal_vzmovl_2i32_8i32:
117+
; X86: # %bb.0:
118+
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
119+
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
120+
; X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
121+
; X86-NEXT: vxorps %xmm1, %xmm1, %xmm1
122+
; X86-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
123+
; X86-NEXT: vmovaps %ymm0, (%eax)
124+
; X86-NEXT: vzeroupper
125+
; X86-NEXT: retl
126126
;
127127
; X64-LABEL: legal_vzmovl_2i32_8i32:
128128
; X64: # %bb.0:
@@ -140,14 +140,14 @@ define void @legal_vzmovl_2i32_8i32(ptr %in, ptr %out) {
140140
}
141141

142142
define void @legal_vzmovl_2i64_4i64(ptr %in, ptr %out) {
143-
; X32-LABEL: legal_vzmovl_2i64_4i64:
144-
; X32: # %bb.0:
145-
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
146-
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
147-
; X32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
148-
; X32-NEXT: vmovaps %ymm0, (%eax)
149-
; X32-NEXT: vzeroupper
150-
; X32-NEXT: retl
143+
; X86-LABEL: legal_vzmovl_2i64_4i64:
144+
; X86: # %bb.0:
145+
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
146+
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
147+
; X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
148+
; X86-NEXT: vmovaps %ymm0, (%eax)
149+
; X86-NEXT: vzeroupper
150+
; X86-NEXT: retl
151151
;
152152
; X64-LABEL: legal_vzmovl_2i64_4i64:
153153
; X64: # %bb.0:
@@ -163,16 +163,16 @@ define void @legal_vzmovl_2i64_4i64(ptr %in, ptr %out) {
163163
}
164164

165165
define void @legal_vzmovl_2f32_8f32(ptr %in, ptr %out) {
166-
; X32-LABEL: legal_vzmovl_2f32_8f32:
167-
; X32: # %bb.0:
168-
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
169-
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
170-
; X32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
171-
; X32-NEXT: vxorps %xmm1, %xmm1, %xmm1
172-
; X32-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
173-
; X32-NEXT: vmovaps %ymm0, (%eax)
174-
; X32-NEXT: vzeroupper
175-
; X32-NEXT: retl
166+
; X86-LABEL: legal_vzmovl_2f32_8f32:
167+
; X86: # %bb.0:
168+
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
169+
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
170+
; X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
171+
; X86-NEXT: vxorps %xmm1, %xmm1, %xmm1
172+
; X86-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
173+
; X86-NEXT: vmovaps %ymm0, (%eax)
174+
; X86-NEXT: vzeroupper
175+
; X86-NEXT: retl
176176
;
177177
; X64-LABEL: legal_vzmovl_2f32_8f32:
178178
; X64: # %bb.0:
@@ -190,14 +190,14 @@ define void @legal_vzmovl_2f32_8f32(ptr %in, ptr %out) {
190190
}
191191

192192
define void @legal_vzmovl_2f64_4f64(ptr %in, ptr %out) {
193-
; X32-LABEL: legal_vzmovl_2f64_4f64:
194-
; X32: # %bb.0:
195-
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
196-
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
197-
; X32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
198-
; X32-NEXT: vmovaps %ymm0, (%eax)
199-
; X32-NEXT: vzeroupper
200-
; X32-NEXT: retl
193+
; X86-LABEL: legal_vzmovl_2f64_4f64:
194+
; X86: # %bb.0:
195+
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
196+
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
197+
; X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
198+
; X86-NEXT: vmovaps %ymm0, (%eax)
199+
; X86-NEXT: vzeroupper
200+
; X86-NEXT: retl
201201
;
202202
; X64-LABEL: legal_vzmovl_2f64_4f64:
203203
; X64: # %bb.0:

‎llvm/test/CodeGen/X86/vec_extract-mmx.ll

Lines changed: 33 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -1,15 +1,15 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc < %s -mtriple=i686-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X32
2+
; RUN: llc < %s -mtriple=i686-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X86
33
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X64
44

55
define i32 @test0(ptr %v4) nounwind {
6-
; X32-LABEL: test0:
7-
; X32: # %bb.0: # %entry
8-
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
9-
; X32-NEXT: pshufw $238, (%eax), %mm0 # mm0 = mem[2,3,2,3]
10-
; X32-NEXT: movd %mm0, %eax
11-
; X32-NEXT: addl $32, %eax
12-
; X32-NEXT: retl
6+
; X86-LABEL: test0:
7+
; X86: # %bb.0: # %entry
8+
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
9+
; X86-NEXT: pshufw $238, (%eax), %mm0 # mm0 = mem[2,3,2,3]
10+
; X86-NEXT: movd %mm0, %eax
11+
; X86-NEXT: addl $32, %eax
12+
; X86-NEXT: retl
1313
;
1414
; X64-LABEL: test0:
1515
; X64: # %bb.0: # %entry
@@ -32,14 +32,14 @@ entry:
3232
}
3333

3434
define i32 @test1(ptr nocapture readonly %ptr) nounwind {
35-
; X32-LABEL: test1:
36-
; X32: # %bb.0: # %entry
37-
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
38-
; X32-NEXT: movd (%eax), %mm0
39-
; X32-NEXT: pshufw $232, %mm0, %mm0 # mm0 = mm0[0,2,2,3]
40-
; X32-NEXT: movd %mm0, %eax
41-
; X32-NEXT: emms
42-
; X32-NEXT: retl
35+
; X86-LABEL: test1:
36+
; X86: # %bb.0: # %entry
37+
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
38+
; X86-NEXT: movd (%eax), %mm0
39+
; X86-NEXT: pshufw $232, %mm0, %mm0 # mm0 = mm0[0,2,2,3]
40+
; X86-NEXT: movd %mm0, %eax
41+
; X86-NEXT: emms
42+
; X86-NEXT: retl
4343
;
4444
; X64-LABEL: test1:
4545
; X64: # %bb.0: # %entry
@@ -67,13 +67,13 @@ entry:
6767
}
6868

6969
define i32 @test2(ptr nocapture readonly %ptr) nounwind {
70-
; X32-LABEL: test2:
71-
; X32: # %bb.0: # %entry
72-
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
73-
; X32-NEXT: pshufw $232, (%eax), %mm0 # mm0 = mem[0,2,2,3]
74-
; X32-NEXT: movd %mm0, %eax
75-
; X32-NEXT: emms
76-
; X32-NEXT: retl
70+
; X86-LABEL: test2:
71+
; X86: # %bb.0: # %entry
72+
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
73+
; X86-NEXT: pshufw $232, (%eax), %mm0 # mm0 = mem[0,2,2,3]
74+
; X86-NEXT: movd %mm0, %eax
75+
; X86-NEXT: emms
76+
; X86-NEXT: retl
7777
;
7878
; X64-LABEL: test2:
7979
; X64: # %bb.0: # %entry
@@ -94,10 +94,10 @@ entry:
9494
}
9595

9696
define i32 @test3(x86_mmx %a) nounwind {
97-
; X32-LABEL: test3:
98-
; X32: # %bb.0:
99-
; X32-NEXT: movd %mm0, %eax
100-
; X32-NEXT: retl
97+
; X86-LABEL: test3:
98+
; X86: # %bb.0:
99+
; X86-NEXT: movd %mm0, %eax
100+
; X86-NEXT: retl
101101
;
102102
; X64-LABEL: test3:
103103
; X64: # %bb.0:
@@ -110,12 +110,12 @@ define i32 @test3(x86_mmx %a) nounwind {
110110

111111
; Verify we don't muck with extractelts from the upper lane.
112112
define i32 @test4(x86_mmx %a) nounwind {
113-
; X32-LABEL: test4:
114-
; X32: # %bb.0:
115-
; X32-NEXT: movq2dq %mm0, %xmm0
116-
; X32-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]
117-
; X32-NEXT: movd %xmm0, %eax
118-
; X32-NEXT: retl
113+
; X86-LABEL: test4:
114+
; X86: # %bb.0:
115+
; X86-NEXT: movq2dq %mm0, %xmm0
116+
; X86-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]
117+
; X86-NEXT: movd %xmm0, %eax
118+
; X86-NEXT: retl
119119
;
120120
; X64-LABEL: test4:
121121
; X64: # %bb.0:

‎llvm/test/CodeGen/X86/vec_extract-sse4.ll

Lines changed: 25 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -1,15 +1,15 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X32
2+
; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X86
33
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64
44

55
define void @t1(ptr %R, ptr %P1) nounwind {
6-
; X32-LABEL: t1:
7-
; X32: # %bb.0:
8-
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
9-
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
10-
; X32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
11-
; X32-NEXT: movss %xmm0, (%eax)
12-
; X32-NEXT: retl
6+
; X86-LABEL: t1:
7+
; X86: # %bb.0:
8+
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
9+
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
10+
; X86-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
11+
; X86-NEXT: movss %xmm0, (%eax)
12+
; X86-NEXT: retl
1313
;
1414
; X64-LABEL: t1:
1515
; X64: # %bb.0:
@@ -23,11 +23,11 @@ define void @t1(ptr %R, ptr %P1) nounwind {
2323
}
2424

2525
define float @t2(ptr %P1) nounwind {
26-
; X32-LABEL: t2:
27-
; X32: # %bb.0:
28-
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
29-
; X32-NEXT: flds 8(%eax)
30-
; X32-NEXT: retl
26+
; X86-LABEL: t2:
27+
; X86: # %bb.0:
28+
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
29+
; X86-NEXT: flds 8(%eax)
30+
; X86-NEXT: retl
3131
;
3232
; X64-LABEL: t2:
3333
; X64: # %bb.0:
@@ -39,13 +39,13 @@ define float @t2(ptr %P1) nounwind {
3939
}
4040

4141
define void @t3(ptr %R, ptr %P1) nounwind {
42-
; X32-LABEL: t3:
43-
; X32: # %bb.0:
44-
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
45-
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
46-
; X32-NEXT: movl 12(%ecx), %ecx
47-
; X32-NEXT: movl %ecx, (%eax)
48-
; X32-NEXT: retl
42+
; X86-LABEL: t3:
43+
; X86: # %bb.0:
44+
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
45+
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
46+
; X86-NEXT: movl 12(%ecx), %ecx
47+
; X86-NEXT: movl %ecx, (%eax)
48+
; X86-NEXT: retl
4949
;
5050
; X64-LABEL: t3:
5151
; X64: # %bb.0:
@@ -59,11 +59,11 @@ define void @t3(ptr %R, ptr %P1) nounwind {
5959
}
6060

6161
define i32 @t4(ptr %P1) nounwind {
62-
; X32-LABEL: t4:
63-
; X32: # %bb.0:
64-
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
65-
; X32-NEXT: movl 12(%eax), %eax
66-
; X32-NEXT: retl
62+
; X86-LABEL: t4:
63+
; X86: # %bb.0:
64+
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
65+
; X86-NEXT: movl 12(%eax), %eax
66+
; X86-NEXT: retl
6767
;
6868
; X64-LABEL: t4:
6969
; X64: # %bb.0:

0 commit comments

Comments
 (0)