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[GlobalISel] Make the Combiner insert G_FREEZE when converting G_SELECT to binary operations. (#82733)
This is needed because the binary operators (G_OR and G_AND) do not have the poison-suppressing semantics of G_SELECT. Fixes #72475
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3 files changed

+32
-16
lines changed

3 files changed

+32
-16
lines changed

‎llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp

Lines changed: 8 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -6511,7 +6511,8 @@ bool CombinerHelper::tryFoldBoolSelectToLogic(GSelect *Select,
65116511
B.setInstrAndDebugLoc(*Select);
65126512
Register Ext = MRI.createGenericVirtualRegister(TrueTy);
65136513
B.buildZExtOrTrunc(Ext, Cond);
6514-
B.buildOr(DstReg, Ext, False, Flags);
6514+
auto FreezeFalse = B.buildFreeze(TrueTy, False);
6515+
B.buildOr(DstReg, Ext, FreezeFalse, Flags);
65156516
};
65166517
return true;
65176518
}
@@ -6523,7 +6524,8 @@ bool CombinerHelper::tryFoldBoolSelectToLogic(GSelect *Select,
65236524
B.setInstrAndDebugLoc(*Select);
65246525
Register Ext = MRI.createGenericVirtualRegister(TrueTy);
65256526
B.buildZExtOrTrunc(Ext, Cond);
6526-
B.buildAnd(DstReg, Ext, True);
6527+
auto FreezeTrue = B.buildFreeze(TrueTy, True);
6528+
B.buildAnd(DstReg, Ext, FreezeTrue);
65276529
};
65286530
return true;
65296531
}
@@ -6538,7 +6540,8 @@ bool CombinerHelper::tryFoldBoolSelectToLogic(GSelect *Select,
65386540
// Then an ext to match the destination register.
65396541
Register Ext = MRI.createGenericVirtualRegister(TrueTy);
65406542
B.buildZExtOrTrunc(Ext, Inner);
6541-
B.buildOr(DstReg, Ext, True, Flags);
6543+
auto FreezeTrue = B.buildFreeze(TrueTy, True);
6544+
B.buildOr(DstReg, Ext, FreezeTrue, Flags);
65426545
};
65436546
return true;
65446547
}
@@ -6553,7 +6556,8 @@ bool CombinerHelper::tryFoldBoolSelectToLogic(GSelect *Select,
65536556
// Then an ext to match the destination register.
65546557
Register Ext = MRI.createGenericVirtualRegister(TrueTy);
65556558
B.buildZExtOrTrunc(Ext, Inner);
6556-
B.buildAnd(DstReg, Ext, False);
6559+
auto FreezeFalse = B.buildFreeze(TrueTy, False);
6560+
B.buildAnd(DstReg, Ext, FreezeFalse);
65576561
};
65586562
return true;
65596563
}

‎llvm/test/CodeGen/AArch64/GlobalISel/combine-select.mir

Lines changed: 14 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -118,7 +118,8 @@ body: |
118118
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x2
119119
; CHECK-NEXT: %c:_(s1) = G_TRUNC [[COPY]](s64)
120120
; CHECK-NEXT: %f:_(s1) = G_TRUNC [[COPY1]](s64)
121-
; CHECK-NEXT: %sel:_(s1) = G_OR %c, %f
121+
; CHECK-NEXT: [[FREEZE:%[0-9]+]]:_(s1) = G_FREEZE %f
122+
; CHECK-NEXT: %sel:_(s1) = G_OR %c, [[FREEZE]]
122123
; CHECK-NEXT: %ext:_(s32) = G_ANYEXT %sel(s1)
123124
; CHECK-NEXT: $w0 = COPY %ext(s32)
124125
%0:_(s64) = COPY $x0
@@ -144,7 +145,8 @@ body: |
144145
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x2
145146
; CHECK-NEXT: %c:_(s1) = G_TRUNC [[COPY]](s64)
146147
; CHECK-NEXT: %f:_(s1) = G_TRUNC [[COPY1]](s64)
147-
; CHECK-NEXT: %sel:_(s1) = G_OR %c, %f
148+
; CHECK-NEXT: [[FREEZE:%[0-9]+]]:_(s1) = G_FREEZE %f
149+
; CHECK-NEXT: %sel:_(s1) = G_OR %c, [[FREEZE]]
148150
; CHECK-NEXT: %ext:_(s32) = G_ANYEXT %sel(s1)
149151
; CHECK-NEXT: $w0 = COPY %ext(s32)
150152
%0:_(s64) = COPY $x0
@@ -171,7 +173,8 @@ body: |
171173
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $d2
172174
; CHECK-NEXT: %c:_(<2 x s1>) = G_TRUNC [[COPY]](<2 x s32>)
173175
; CHECK-NEXT: %f:_(<2 x s1>) = G_TRUNC [[COPY1]](<2 x s32>)
174-
; CHECK-NEXT: %sel:_(<2 x s1>) = G_OR %c, %f
176+
; CHECK-NEXT: [[FREEZE:%[0-9]+]]:_(<2 x s1>) = G_FREEZE %f
177+
; CHECK-NEXT: %sel:_(<2 x s1>) = G_OR %c, [[FREEZE]]
175178
; CHECK-NEXT: %ext:_(<2 x s32>) = G_ANYEXT %sel(<2 x s1>)
176179
; CHECK-NEXT: $d0 = COPY %ext(<2 x s32>)
177180
%0:_(<2 x s32>) = COPY $d0
@@ -199,7 +202,8 @@ body: |
199202
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
200203
; CHECK-NEXT: %c:_(s1) = G_TRUNC [[COPY]](s64)
201204
; CHECK-NEXT: %t:_(s1) = G_TRUNC [[COPY1]](s64)
202-
; CHECK-NEXT: %sel:_(s1) = G_AND %c, %t
205+
; CHECK-NEXT: [[FREEZE:%[0-9]+]]:_(s1) = G_FREEZE %t
206+
; CHECK-NEXT: %sel:_(s1) = G_AND %c, [[FREEZE]]
203207
; CHECK-NEXT: %ext:_(s32) = G_ANYEXT %sel(s1)
204208
; CHECK-NEXT: $w0 = COPY %ext(s32)
205209
%0:_(s64) = COPY $x0
@@ -226,7 +230,8 @@ body: |
226230
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
227231
; CHECK-NEXT: %c:_(s1) = G_TRUNC [[COPY]](s64)
228232
; CHECK-NEXT: %t:_(s1) = G_TRUNC [[COPY1]](s64)
229-
; CHECK-NEXT: %sel:_(s1) = G_AND %c, %t
233+
; CHECK-NEXT: [[FREEZE:%[0-9]+]]:_(s1) = G_FREEZE %t
234+
; CHECK-NEXT: %sel:_(s1) = G_AND %c, [[FREEZE]]
230235
; CHECK-NEXT: %ext:_(s32) = G_ANYEXT %sel(s1)
231236
; CHECK-NEXT: $w0 = COPY %ext(s32)
232237
%0:_(s64) = COPY $x0
@@ -255,7 +260,8 @@ body: |
255260
; CHECK-NEXT: %t:_(s1) = G_TRUNC [[COPY1]](s64)
256261
; CHECK-NEXT: %one:_(s1) = G_CONSTANT i1 true
257262
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s1) = G_XOR %c, %one
258-
; CHECK-NEXT: %sel:_(s1) = G_OR [[XOR]], %t
263+
; CHECK-NEXT: [[FREEZE:%[0-9]+]]:_(s1) = G_FREEZE %t
264+
; CHECK-NEXT: %sel:_(s1) = G_OR [[XOR]], [[FREEZE]]
259265
; CHECK-NEXT: %ext:_(s32) = G_ANYEXT %sel(s1)
260266
; CHECK-NEXT: $w0 = COPY %ext(s32)
261267
%0:_(s64) = COPY $x0
@@ -284,7 +290,8 @@ body: |
284290
; CHECK-NEXT: %f:_(s1) = G_TRUNC [[COPY1]](s64)
285291
; CHECK-NEXT: [[C:%[0-9]+]]:_(s1) = G_CONSTANT i1 true
286292
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s1) = G_XOR %c, [[C]]
287-
; CHECK-NEXT: %sel:_(s1) = G_AND [[XOR]], %f
293+
; CHECK-NEXT: [[FREEZE:%[0-9]+]]:_(s1) = G_FREEZE %f
294+
; CHECK-NEXT: %sel:_(s1) = G_AND [[XOR]], [[FREEZE]]
288295
; CHECK-NEXT: %ext:_(s32) = G_ANYEXT %sel(s1)
289296
; CHECK-NEXT: $w0 = COPY %ext(s32)
290297
%0:_(s64) = COPY $x0

‎llvm/test/CodeGen/AArch64/cmp-chains.ll

Lines changed: 10 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -109,7 +109,8 @@ define i32 @cmp_or2(i32 %0, i32 %1, i32 %2, i32 %3) {
109109
; GISEL-NEXT: cset w8, lo
110110
; GISEL-NEXT: cmp w2, w3
111111
; GISEL-NEXT: cset w9, ne
112-
; GISEL-NEXT: orr w0, w8, w9
112+
; GISEL-NEXT: orr w8, w8, w9
113+
; GISEL-NEXT: and w0, w8, #0x1
113114
; GISEL-NEXT: ret
114115
%5 = icmp ult i32 %0, %1
115116
%6 = icmp ne i32 %2, %3
@@ -137,7 +138,8 @@ define i32 @cmp_or3(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
137138
; GISEL-NEXT: cmp w4, w5
138139
; GISEL-NEXT: orr w8, w8, w9
139140
; GISEL-NEXT: cset w9, ne
140-
; GISEL-NEXT: orr w0, w8, w9
141+
; GISEL-NEXT: orr w8, w8, w9
142+
; GISEL-NEXT: and w0, w8, #0x1
141143
; GISEL-NEXT: ret
142144
%7 = icmp ult i32 %0, %1
143145
%8 = icmp ugt i32 %2, %3
@@ -171,7 +173,8 @@ define i32 @cmp_or4(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32
171173
; GISEL-NEXT: orr w8, w8, w9
172174
; GISEL-NEXT: cset w11, eq
173175
; GISEL-NEXT: orr w9, w10, w11
174-
; GISEL-NEXT: orr w0, w8, w9
176+
; GISEL-NEXT: orr w8, w8, w9
177+
; GISEL-NEXT: and w0, w8, #0x1
175178
; GISEL-NEXT: ret
176179
%9 = icmp ult i32 %0, %1
177180
%10 = icmp ugt i32 %2, %3
@@ -199,7 +202,8 @@ define i32 @true_or2(i32 %0, i32 %1) {
199202
; GISEL-NEXT: cset w8, ne
200203
; GISEL-NEXT: cmp w1, #0
201204
; GISEL-NEXT: cset w9, ne
202-
; GISEL-NEXT: orr w0, w8, w9
205+
; GISEL-NEXT: orr w8, w8, w9
206+
; GISEL-NEXT: and w0, w8, #0x1
203207
; GISEL-NEXT: ret
204208
%3 = icmp ne i32 %0, 0
205209
%4 = icmp ne i32 %1, 0
@@ -227,7 +231,8 @@ define i32 @true_or3(i32 %0, i32 %1, i32 %2) {
227231
; GISEL-NEXT: cmp w2, #0
228232
; GISEL-NEXT: orr w8, w8, w9
229233
; GISEL-NEXT: cset w9, ne
230-
; GISEL-NEXT: orr w0, w8, w9
234+
; GISEL-NEXT: orr w8, w8, w9
235+
; GISEL-NEXT: and w0, w8, #0x1
231236
; GISEL-NEXT: ret
232237
%4 = icmp ne i32 %0, 0
233238
%5 = icmp ne i32 %1, 0

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