|
1 |
| -; RUN: opt < %s -passes=instcombine -S | grep shufflevector |
| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py |
| 2 | +; RUN: opt -S -passes=instcombine < %s | FileCheck %s |
2 | 3 | ; PR2645
|
3 |
| - |
4 | 4 | ; instcombine shouldn't delete the shufflevector.
|
5 | 5 |
|
6 |
| -define internal void @""(i8*, i32, i8*) { |
7 |
| -; <label>:3 |
8 |
| - br label %4 |
| 6 | +define internal void @0(i8* %arg, i32 %arg1, i8* %arg2) { |
| 7 | +; CHECK-LABEL: @0( |
| 8 | +; CHECK-NEXT: bb: |
| 9 | +; CHECK-NEXT: br label [[BB3:%.*]] |
| 10 | +; CHECK: bb3: |
| 11 | +; CHECK-NEXT: [[DOT0:%.*]] = phi i32 [ 0, [[BB:%.*]] ], [ [[I17:%.*]], [[BB4:%.*]] ] |
| 12 | +; CHECK-NEXT: [[I:%.*]] = icmp slt i32 [[DOT0]], [[ARG1:%.*]] |
| 13 | +; CHECK-NEXT: br i1 [[I]], label [[BB4]], label [[BB18:%.*]] |
| 14 | +; CHECK: bb4: |
| 15 | +; CHECK-NEXT: [[TMP0:%.*]] = sext i32 [[DOT0]] to i64 |
| 16 | +; CHECK-NEXT: [[I5:%.*]] = getelementptr i8, i8* [[ARG2:%.*]], i64 [[TMP0]] |
| 17 | +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[I5]] to <1 x i64>* |
| 18 | +; CHECK-NEXT: [[I71:%.*]] = load <1 x i64>, <1 x i64>* [[TMP1]], align 1 |
| 19 | +; CHECK-NEXT: [[I9:%.*]] = call <2 x i64> @foo(<1 x i64> [[I71]]) |
| 20 | +; CHECK-NEXT: [[I11:%.*]] = bitcast <2 x i64> [[I9]] to <8 x i16> |
| 21 | +; CHECK-NEXT: [[I12:%.*]] = shufflevector <8 x i16> [[I11]], <8 x i16> poison, <8 x i32> <i32 0, i32 0, i32 1, i32 1, i32 2, i32 2, i32 3, i32 3> |
| 22 | +; CHECK-NEXT: [[I13:%.*]] = bitcast <8 x i16> [[I12]] to <4 x i32> |
| 23 | +; CHECK-NEXT: [[I14:%.*]] = sitofp <4 x i32> [[I13]] to <4 x float> |
| 24 | +; CHECK-NEXT: [[TMP2:%.*]] = sext i32 [[DOT0]] to i64 |
| 25 | +; CHECK-NEXT: [[I15:%.*]] = getelementptr i8, i8* [[ARG:%.*]], i64 [[TMP2]] |
| 26 | +; CHECK-NEXT: [[I16:%.*]] = bitcast i8* [[I15]] to <4 x float>* |
| 27 | +; CHECK-NEXT: store <4 x float> [[I14]], <4 x float>* [[I16]], align 1 |
| 28 | +; CHECK-NEXT: [[I17]] = add i32 [[DOT0]], 1 |
| 29 | +; CHECK-NEXT: br label [[BB3]] |
| 30 | +; CHECK: bb18: |
| 31 | +; CHECK-NEXT: call void @llvm.x86.mmx.emms() |
| 32 | +; CHECK-NEXT: ret void |
| 33 | +; |
| 34 | +bb: |
| 35 | + br label %bb3 |
9 | 36 |
|
10 |
| -; <label>:4 ; preds = %6, %3 |
11 |
| - %.0 = phi i32 [ 0, %3 ], [ %19, %6 ] ; <i32> [#uses=4] |
12 |
| - %5 = icmp slt i32 %.0, %1 ; <i1> [#uses=1] |
13 |
| - br i1 %5, label %6, label %20 |
| 37 | +bb3: ; preds = %bb4, %bb |
| 38 | + %.0 = phi i32 [ 0, %bb ], [ %i17, %bb4 ] |
| 39 | + %i = icmp slt i32 %.0, %arg1 |
| 40 | + br i1 %i, label %bb4, label %bb18 |
14 | 41 |
|
15 |
| -; <label>:6 ; preds = %4 |
16 |
| - %7 = getelementptr i8, i8* %2, i32 %.0 ; <i8*> [#uses=1] |
17 |
| - %8 = bitcast i8* %7 to <4 x i16>* ; <<4 x i16>*> [#uses=1] |
18 |
| - %9 = load <4 x i16>, <4 x i16>* %8, align 1 ; <<4 x i16>> [#uses=1] |
19 |
| - %10 = bitcast <4 x i16> %9 to <1 x i64> ; <<1 x i64>> [#uses=1] |
20 |
| - %11 = call <2 x i64> @foo(<1 x i64> %10) |
21 |
| -; <<2 x i64>> [#uses=1] |
22 |
| - %12 = bitcast <2 x i64> %11 to <4 x i32> ; <<4 x i32>> [#uses=1] |
23 |
| - %13 = bitcast <4 x i32> %12 to <8 x i16> ; <<8 x i16>> [#uses=2] |
24 |
| - %14 = shufflevector <8 x i16> %13, <8 x i16> %13, <8 x i32> < i32 0, i32 0, i32 1, i32 1, i32 2, i32 2, i32 3, i32 3 > ; <<8 x i16>> [#uses=1] |
25 |
| - %15 = bitcast <8 x i16> %14 to <4 x i32> ; <<4 x i32>> [#uses=1] |
26 |
| - %16 = sitofp <4 x i32> %15 to <4 x float> ; <<4 x float>> [#uses=1] |
27 |
| - %17 = getelementptr i8, i8* %0, i32 %.0 ; <i8*> [#uses=1] |
28 |
| - %18 = bitcast i8* %17 to <4 x float>* ; <<4 x float>*> [#uses=1] |
29 |
| - store <4 x float> %16, <4 x float>* %18, align 1 |
30 |
| - %19 = add i32 %.0, 1 ; <i32> [#uses=1] |
31 |
| - br label %4 |
| 42 | +bb4: ; preds = %bb3 |
| 43 | + %i5 = getelementptr i8, i8* %arg2, i32 %.0 |
| 44 | + %i6 = bitcast i8* %i5 to <4 x i16>* |
| 45 | + %i7 = load <4 x i16>, <4 x i16>* %i6, align 1 |
| 46 | + %i8 = bitcast <4 x i16> %i7 to <1 x i64> |
| 47 | + %i9 = call <2 x i64> @foo(<1 x i64> %i8) |
| 48 | + %i10 = bitcast <2 x i64> %i9 to <4 x i32> |
| 49 | + %i11 = bitcast <4 x i32> %i10 to <8 x i16> |
| 50 | + %i12 = shufflevector <8 x i16> %i11, <8 x i16> %i11, <8 x i32> <i32 0, i32 0, i32 1, i32 1, i32 2, i32 2, i32 3, i32 3> |
| 51 | + %i13 = bitcast <8 x i16> %i12 to <4 x i32> |
| 52 | + %i14 = sitofp <4 x i32> %i13 to <4 x float> |
| 53 | + %i15 = getelementptr i8, i8* %arg, i32 %.0 |
| 54 | + %i16 = bitcast i8* %i15 to <4 x float>* |
| 55 | + store <4 x float> %i14, <4 x float>* %i16, align 1 |
| 56 | + %i17 = add i32 %.0, 1 |
| 57 | + br label %bb3 |
32 | 58 |
|
33 |
| -; <label>:20 ; preds = %4 |
34 |
| - call void @llvm.x86.mmx.emms( ) |
35 |
| - ret void |
| 59 | +bb18: ; preds = %bb3 |
| 60 | + call void @llvm.x86.mmx.emms() |
| 61 | + ret void |
36 | 62 | }
|
37 | 63 |
|
38 | 64 | declare <2 x i64> @foo(<1 x i64>)
|
39 |
| -declare void @llvm.x86.mmx.emms( ) |
| 65 | + |
| 66 | +declare void @llvm.x86.mmx.emms() #0 |
| 67 | + |
| 68 | +attributes #0 = { nounwind } |
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