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[X86] Check if there is stack access in the spilled FP/BP range (#106035)
In the clobbered FP/BP range, we can't use it as normal FP/BP to access stack. So if there are stack accesses due to register spill, scheduling or other back end optimization, we should report an error instead of silently generate wrong code. Also try to minimize the save/restore range of the clobbered FP/BP if the FrameSetup doesn't change stack size.
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6 files changed

+94
-119
lines changed

6 files changed

+94
-119
lines changed

‎llvm/lib/Target/X86/X86FrameLowering.cpp

Lines changed: 32 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4430,6 +4430,33 @@ static bool isInvoke(const MachineInstr &MI, bool InsideEHLabels) {
44304430
return true;
44314431
}
44324432

4433+
/// Given the live range of FP or BP (DefMI, KillMI), check if there is any
4434+
/// interfered stack access in the range, usually generated by register spill.
4435+
void X86FrameLowering::checkInterferedAccess(
4436+
MachineFunction &MF, MachineBasicBlock::reverse_iterator DefMI,
4437+
MachineBasicBlock::reverse_iterator KillMI, bool SpillFP,
4438+
bool SpillBP) const {
4439+
if (DefMI == KillMI)
4440+
return;
4441+
if (TRI->hasBasePointer(MF)) {
4442+
if (!SpillBP)
4443+
return;
4444+
} else {
4445+
if (!SpillFP)
4446+
return;
4447+
}
4448+
4449+
auto MI = KillMI;
4450+
while (MI != DefMI) {
4451+
if (any_of(MI->operands(),
4452+
[](const MachineOperand &MO) { return MO.isFI(); }))
4453+
MF.getContext().reportError(SMLoc(),
4454+
"Interference usage of base pointer/frame "
4455+
"pointer.");
4456+
MI++;
4457+
}
4458+
}
4459+
44334460
/// If a function uses base pointer and the base pointer is clobbered by inline
44344461
/// asm, RA doesn't detect this case, and after the inline asm, the base pointer
44354462
/// contains garbage value.
@@ -4533,7 +4560,6 @@ void X86FrameLowering::spillFPBP(MachineFunction &MF) const {
45334560
// If the bp is clobbered by a call, we should save and restore outside of
45344561
// the frame setup instructions.
45354562
if (KillMI->isCall() && DefMI != ME) {
4536-
const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
45374563
auto FrameSetup = std::next(DefMI);
45384564
// Look for frame setup instruction toward the start of the BB.
45394565
// If we reach another call instruction, it means no frame setup
@@ -4543,7 +4569,9 @@ void X86FrameLowering::spillFPBP(MachineFunction &MF) const {
45434569
++FrameSetup;
45444570
// If a frame setup instruction is found, we need to find out the
45454571
// corresponding frame destroy instruction.
4546-
if (FrameSetup != ME && TII.isFrameSetup(*FrameSetup)) {
4572+
if (FrameSetup != ME && TII.isFrameSetup(*FrameSetup) &&
4573+
(TII.getFrameSize(*FrameSetup) ||
4574+
TII.getFrameAdjustment(*FrameSetup))) {
45474575
while (!TII.isFrameInstr(*KillMI))
45484576
--KillMI;
45494577
DefMI = FrameSetup;
@@ -4552,6 +4580,8 @@ void X86FrameLowering::spillFPBP(MachineFunction &MF) const {
45524580
}
45534581
}
45544582

4583+
checkInterferedAccess(MF, DefMI, KillMI, SpillFP, SpillBP);
4584+
45554585
// Call target function to spill and restore FP and BP registers.
45564586
saveAndRestoreFPBPUsingSP(MF, &(*DefMI), &(*KillMI), SpillFP, SpillBP);
45574587
}

‎llvm/lib/Target/X86/X86FrameLowering.h

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -287,6 +287,11 @@ class X86FrameLowering : public TargetFrameLowering {
287287
MachineBasicBlock::iterator AfterMI,
288288
bool SpillFP, bool SpillBP) const;
289289

290+
void checkInterferedAccess(MachineFunction &MF,
291+
MachineBasicBlock::reverse_iterator DefMI,
292+
MachineBasicBlock::reverse_iterator KillMI,
293+
bool SpillFP, bool SpillBP) const;
294+
290295
// If MI uses fp/bp, but target can handle it, and doesn't want to be spilled
291296
// again, this function should return true, and update MI so we will not check
292297
// any instructions from related sequence.

‎llvm/test/CodeGen/X86/avx512-intel-ocl.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -69,9 +69,9 @@ define <16 x float> @testf16_inp(<16 x float> %a, <16 x float> %b) nounwind {
6969
; X64-NEXT: andq $-64, %rsp
7070
; X64-NEXT: subq $128, %rsp
7171
; X64-NEXT: vaddps %zmm1, %zmm0, %zmm0
72+
; X64-NEXT: movq %rsp, %rdi
7273
; X64-NEXT: pushq %rbp
7374
; X64-NEXT: pushq %rax
74-
; X64-NEXT: movq %rsp, %rdi
7575
; X64-NEXT: callq _func_float16_ptr
7676
; X64-NEXT: addq $8, %rsp
7777
; X64-NEXT: popq %rbp
@@ -153,9 +153,9 @@ define <16 x float> @testf16_regs(<16 x float> %a, <16 x float> %b) nounwind {
153153
; X64-NEXT: subq $128, %rsp
154154
; X64-NEXT: vmovaps %zmm1, %zmm16
155155
; X64-NEXT: vaddps %zmm1, %zmm0, %zmm0
156+
; X64-NEXT: movq %rsp, %rdi
156157
; X64-NEXT: pushq %rbp
157158
; X64-NEXT: pushq %rax
158-
; X64-NEXT: movq %rsp, %rdi
159159
; X64-NEXT: callq _func_float16_ptr
160160
; X64-NEXT: addq $8, %rsp
161161
; X64-NEXT: popq %rbp

‎llvm/test/CodeGen/X86/clobber_frame_ptr.ll

Lines changed: 1 addition & 57 deletions
Original file line numberDiff line numberDiff line change
@@ -102,62 +102,6 @@ define i64 @test2(i64 %a0, i64 %a1) {
102102
ret i64 %x
103103
}
104104

105-
; Test with more arguments, so some of them are passed from stack. The spilling
106-
; of rbp should not disturb stack arguments.
107-
; fixme: current generated code is wrong because rbp is used to load passed in
108-
; argument after rbp is assigned argument for function call, it is caused
109-
; by x86-cf-opt.
110-
define i64 @test3(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, i64 %a7) {
111-
; CHECK-LABEL: test3:
112-
; CHECK: # %bb.0:
113-
; CHECK-NEXT: pushq %rbp
114-
; CHECK-NEXT: .cfi_def_cfa_offset 16
115-
; CHECK-NEXT: .cfi_offset %rbp, -16
116-
; CHECK-NEXT: movq %rsp, %rbp
117-
; CHECK-NEXT: .cfi_def_cfa_register %rbp
118-
; CHECK-NEXT: pushq %r15
119-
; CHECK-NEXT: pushq %r14
120-
; CHECK-NEXT: pushq %r13
121-
; CHECK-NEXT: pushq %r12
122-
; CHECK-NEXT: pushq %rbx
123-
; CHECK-NEXT: andq $-16, %rsp
124-
; CHECK-NEXT: subq $16, %rsp
125-
; CHECK-NEXT: .cfi_offset %rbx, -56
126-
; CHECK-NEXT: .cfi_offset %r12, -48
127-
; CHECK-NEXT: .cfi_offset %r13, -40
128-
; CHECK-NEXT: .cfi_offset %r14, -32
129-
; CHECK-NEXT: .cfi_offset %r15, -24
130-
; CHECK-NEXT: pushq %rbp
131-
; CHECK-NEXT: pushq %rax
132-
; CHECK-NEXT: .cfi_remember_state
133-
; CHECK-NEXT: .cfi_escape 0x0f, 0x06, 0x77, 0x08, 0x06, 0x11, 0x10, 0x22 #
134-
; CHECK-NEXT: movq %rsi, %rbp
135-
; CHECK-NEXT: movq %rdi, %r15
136-
; CHECK-NEXT: movq %rdx, %rsi
137-
; CHECK-NEXT: movq %rcx, %rdx
138-
; CHECK-NEXT: movq %r8, %rcx
139-
; CHECK-NEXT: movq %r9, %r8
140-
; CHECK-NEXT: pushq 24(%rbp)
141-
; CHECK-NEXT: pushq 16(%rbp)
142-
; CHECK-NEXT: callq hipe2@PLT
143-
; CHECK-NEXT: addq $8, %rsp
144-
; CHECK-NEXT: popq %rbp
145-
; CHECK-NEXT: .cfi_restore_state
146-
; CHECK-NEXT: addq $16, %rsp
147-
; CHECK-NEXT: movq %r15, %rax
148-
; CHECK-NEXT: leaq -40(%rbp), %rsp
149-
; CHECK-NEXT: popq %rbx
150-
; CHECK-NEXT: popq %r12
151-
; CHECK-NEXT: popq %r13
152-
; CHECK-NEXT: popq %r14
153-
; CHECK-NEXT: popq %r15
154-
; CHECK-NEXT: popq %rbp
155-
; CHECK-NEXT: .cfi_def_cfa %rsp, 8
156-
; CHECK-NEXT: retq
157-
%x = call cc 11 i64 @hipe2(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, i64 %a7)
158-
ret i64 %x
159-
}
160-
161105
@buf = dso_local global [20 x ptr] zeroinitializer, align 16
162106

163107
; longjmp modifies fp, it is expected behavior, wo should not save/restore fp
@@ -182,11 +126,11 @@ define void @test4() {
182126
; CHECK-NEXT: .cfi_offset %r13, -40
183127
; CHECK-NEXT: .cfi_offset %r14, -32
184128
; CHECK-NEXT: .cfi_offset %r15, -24
129+
; CHECK-NEXT: xorl %r13d, %r13d
185130
; CHECK-NEXT: pushq %rbp
186131
; CHECK-NEXT: pushq %rax
187132
; CHECK-NEXT: .cfi_remember_state
188133
; CHECK-NEXT: .cfi_escape 0x0f, 0x06, 0x77, 0x08, 0x06, 0x11, 0x10, 0x22 #
189-
; CHECK-NEXT: xorl %r13d, %r13d
190134
; CHECK-NEXT: callq external@PLT
191135
; CHECK-NEXT: addq $8, %rsp
192136
; CHECK-NEXT: popq %rbp

‎llvm/test/CodeGen/X86/clobber_frame_ptr2.ll

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,16 @@
1+
; RUN: not llc -mtriple=x86_64-pc-linux -stackrealign -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
2+
3+
declare cc 11 i64 @hipe2(i64, i64, i64, i64, i64, i64, i64)
4+
5+
; Test with many arguments, so some of them are passed from stack. The spilling
6+
; of rbp should not disturb stack arguments.
7+
; fixme: current generated code is wrong because rbp is used to load passed in
8+
; argument after rbp is assigned argument for function call, it is caused
9+
; by x86-cf-opt.
10+
11+
; CHECK: <unknown>:0: error: Interference usage of base pointer/frame pointer.
12+
; CHECK: <unknown>:0: error: Interference usage of base pointer/frame pointer.
13+
define i64 @test3(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, i64 %a7) {
14+
%x = call cc 11 i64 @hipe2(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, i64 %a7)
15+
ret i64 %x
16+
}

‎llvm/test/CodeGen/X86/x86-64-flags-intrinsics.ll

Lines changed: 38 additions & 58 deletions
Original file line numberDiff line numberDiff line change
@@ -62,18 +62,13 @@ define i64 @read_flags_reg_pressure() nounwind {
6262
; CHECK-NEXT: pushq %r13
6363
; CHECK-NEXT: pushq %r12
6464
; CHECK-NEXT: pushq %rbx
65-
; CHECK-NEXT: subq $16, %rsp
6665
; CHECK-NEXT: #APP
6766
; CHECK-NEXT: #NO_APP
68-
; CHECK-NEXT: movq %rdx, (%rsp) # 8-byte Spill
6967
; CHECK-NEXT: pushfq
70-
; CHECK-NEXT: popq %rdx
71-
; CHECK-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
72-
; CHECK-NEXT: movq (%rsp), %rdx # 8-byte Reload
68+
; CHECK-NEXT: popq %rbp
7369
; CHECK-NEXT: #APP
7470
; CHECK-NEXT: #NO_APP
75-
; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
76-
; CHECK-NEXT: addq $16, %rsp
71+
; CHECK-NEXT: movq %rbp, %rax
7772
; CHECK-NEXT: popq %rbx
7873
; CHECK-NEXT: popq %r12
7974
; CHECK-NEXT: popq %r13
@@ -94,8 +89,6 @@ define i64 @read_flags_reg_pressure() nounwind {
9489
; WIN64-NEXT: pushq %rbx
9590
; WIN64-NEXT: subq $16, %rsp
9691
; WIN64-NEXT: leaq {{[0-9]+}}(%rsp), %rbp
97-
; WIN64-NEXT: pushq %rbp
98-
; WIN64-NEXT: pushq %rax
9992
; WIN64-NEXT: #APP
10093
; WIN64-NEXT: #NO_APP
10194
; WIN64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
@@ -105,8 +98,6 @@ define i64 @read_flags_reg_pressure() nounwind {
10598
; WIN64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload
10699
; WIN64-NEXT: #APP
107100
; WIN64-NEXT: #NO_APP
108-
; WIN64-NEXT: addq $8, %rsp
109-
; WIN64-NEXT: popq %rbp
110101
; WIN64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
111102
; WIN64-NEXT: addq $16, %rsp
112103
; WIN64-NEXT: popq %rbx
@@ -118,25 +109,24 @@ define i64 @read_flags_reg_pressure() nounwind {
118109
; WIN64-NEXT: popq %r15
119110
; WIN64-NEXT: popq %rbp
120111
; WIN64-NEXT: retq
121-
%1 = tail call { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } asm sideeffect "", "={ax},={bx},={cx},={dx},={si},={di},={bp},={r8},={r9},={r10},={r11},={r12},={r13},={r14},={r15},~{dirflag},~{fpsr},~{flags}"()
122-
%2 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 0
123-
%3 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 1
124-
%4 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 2
125-
%5 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 3
126-
%6 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 4
127-
%7 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 5
128-
%8 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 6
129-
%9 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 7
130-
%10 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 8
131-
%11 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 9
132-
%12 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 10
133-
%13 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 11
134-
%14 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 12
135-
%15 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 13
136-
%16 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 14
137-
%17 = tail call i64 @llvm.x86.flags.read.u64()
138-
tail call void asm sideeffect "", "{ax},{bx},{cx},{dx},{si},{di},{bp},{r8},{r9},{r10},{r11},{r12},{r13},{r14},{r15},~{dirflag},~{fpsr},~{flags}"(i64 %2, i64 %3, i64 %4, i64 %5, i64 %6, i64 %7, i64 %8, i64 %9, i64 %10, i64 %11, i64 %12, i64 %13, i64 %14, i64 %15, i64 %16)
139-
ret i64 %17
112+
%1 = tail call { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } asm sideeffect "", "={ax},={bx},={cx},={dx},={si},={di},={r8},={r9},={r10},={r11},={r12},={r13},={r14},={r15},~{dirflag},~{fpsr},~{flags}"()
113+
%2 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 0
114+
%3 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 1
115+
%4 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 2
116+
%5 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 3
117+
%6 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 4
118+
%7 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 5
119+
%8 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 6
120+
%9 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 7
121+
%10 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 8
122+
%11 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 9
123+
%12 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 10
124+
%13 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 11
125+
%14 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 12
126+
%15 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 13
127+
%flags = tail call i64 @llvm.x86.flags.read.u64()
128+
tail call void asm sideeffect "", "{ax},{bx},{cx},{dx},{si},{di},{r8},{r9},{r10},{r11},{r12},{r13},{r14},{r15},~{dirflag},~{fpsr},~{flags}"(i64 %2, i64 %3, i64 %4, i64 %5, i64 %6, i64 %7, i64 %8, i64 %9, i64 %10, i64 %11, i64 %12, i64 %13, i64 %14, i64 %15)
129+
ret i64 %flags
140130
}
141131

142132
define void @write_flags_reg_pressure(i64 noundef %0) nounwind {
@@ -148,18 +138,13 @@ define void @write_flags_reg_pressure(i64 noundef %0) nounwind {
148138
; CHECK-NEXT: pushq %r13
149139
; CHECK-NEXT: pushq %r12
150140
; CHECK-NEXT: pushq %rbx
151-
; CHECK-NEXT: subq $16, %rsp
152-
; CHECK-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
141+
; CHECK-NEXT: movq %rdi, %rbp
153142
; CHECK-NEXT: #APP
154143
; CHECK-NEXT: #NO_APP
155-
; CHECK-NEXT: movq %rdx, (%rsp) # 8-byte Spill
156-
; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload
157-
; CHECK-NEXT: pushq %rdx
144+
; CHECK-NEXT: pushq %rbp
158145
; CHECK-NEXT: popfq
159-
; CHECK-NEXT: movq (%rsp), %rdx # 8-byte Reload
160146
; CHECK-NEXT: #APP
161147
; CHECK-NEXT: #NO_APP
162-
; CHECK-NEXT: addq $16, %rsp
163148
; CHECK-NEXT: popq %rbx
164149
; CHECK-NEXT: popq %r12
165150
; CHECK-NEXT: popq %r13
@@ -181,8 +166,6 @@ define void @write_flags_reg_pressure(i64 noundef %0) nounwind {
181166
; WIN64-NEXT: subq $16, %rsp
182167
; WIN64-NEXT: leaq {{[0-9]+}}(%rsp), %rbp
183168
; WIN64-NEXT: movq %rcx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
184-
; WIN64-NEXT: pushq %rbp
185-
; WIN64-NEXT: pushq %rax
186169
; WIN64-NEXT: #APP
187170
; WIN64-NEXT: #NO_APP
188171
; WIN64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
@@ -192,8 +175,6 @@ define void @write_flags_reg_pressure(i64 noundef %0) nounwind {
192175
; WIN64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload
193176
; WIN64-NEXT: #APP
194177
; WIN64-NEXT: #NO_APP
195-
; WIN64-NEXT: popq %rax
196-
; WIN64-NEXT: popq %rbp
197178
; WIN64-NEXT: addq $16, %rsp
198179
; WIN64-NEXT: popq %rbx
199180
; WIN64-NEXT: popq %rdi
@@ -204,23 +185,22 @@ define void @write_flags_reg_pressure(i64 noundef %0) nounwind {
204185
; WIN64-NEXT: popq %r15
205186
; WIN64-NEXT: popq %rbp
206187
; WIN64-NEXT: retq
207-
%2 = tail call { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } asm sideeffect "", "={ax},={bx},={cx},={dx},={si},={di},={bp},={r8},={r9},={r10},={r11},={r12},={r13},={r14},={r15},~{dirflag},~{fpsr},~{flags}"()
208-
%3 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 0
209-
%4 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 1
210-
%5 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 2
211-
%6 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 3
212-
%7 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 4
213-
%8 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 5
214-
%9 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 6
215-
%10 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 7
216-
%11 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 8
217-
%12 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 9
218-
%13 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 10
219-
%14 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 11
220-
%15 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 12
221-
%16 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 13
222-
%17 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 14
188+
%2 = tail call { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } asm sideeffect "", "={ax},={bx},={cx},={dx},={si},={di},={r8},={r9},={r10},={r11},={r12},={r13},={r14},={r15},~{dirflag},~{fpsr},~{flags}"()
189+
%3 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 0
190+
%4 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 1
191+
%5 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 2
192+
%6 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 3
193+
%7 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 4
194+
%8 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 5
195+
%9 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 6
196+
%10 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 7
197+
%11 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 8
198+
%12 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 9
199+
%13 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 10
200+
%14 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 11
201+
%15 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 12
202+
%16 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 13
223203
tail call void @llvm.x86.flags.write.u64(i64 %0)
224-
tail call void asm sideeffect "", "{ax},{bx},{cx},{dx},{si},{di},{bp},{r8},{r9},{r10},{r11},{r12},{r13},{r14},{r15},~{dirflag},~{fpsr},~{flags}"(i64 %3, i64 %4, i64 %5, i64 %6, i64 %7, i64 %8, i64 %9, i64 %10, i64 %11, i64 %12, i64 %13, i64 %14, i64 %15, i64 %16, i64 %17)
204+
tail call void asm sideeffect "", "{ax},{bx},{cx},{dx},{si},{di},{r8},{r9},{r10},{r11},{r12},{r13},{r14},{r15},~{dirflag},~{fpsr},~{flags}"(i64 %3, i64 %4, i64 %5, i64 %6, i64 %7, i64 %8, i64 %9, i64 %10, i64 %11, i64 %12, i64 %13, i64 %14, i64 %15, i64 %16)
225205
ret void
226206
}

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