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Revert "[AArch64][GlobalISel] Fix incorrect selection of monotonic s32->s64 anyext load."
This reverts commit 7524ad9. Broke sanitizer build bots, e.g. https://lab.llvm.org/buildbot/#/builders/5/builds/41588/steps/9/logs/stdio
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2 files changed

+8
-34
lines changed

2 files changed

+8
-34
lines changed

llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -2997,14 +2997,13 @@ bool AArch64InstructionSelector::select(MachineInstr &I) {
29972997
}
29982998
}
29992999

3000-
if (IsZExtLoad ||
3001-
(isa<GLoad>(LdSt) && ValTy == LLT::scalar(64) && MemSizeInBits == 32)) {
3002-
// The any/zextload from a smaller type to i32 should be handled by the
3000+
if (IsZExtLoad) {
3001+
// The zextload from a smaller type to i32 should be handled by the
30033002
// importer.
30043003
if (MRI.getType(LoadStore->getOperand(0).getReg()).getSizeInBits() != 64)
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return false;
3006-
// If we have an extending load then change the load's type to be a
3007-
// narrower reg and zero_extend with SUBREG_TO_REG.
3005+
// If we have a ZEXTLOAD then change the load's type to be a narrower reg
3006+
// and zero_extend with SUBREG_TO_REG.
30083007
Register LdReg = MRI.createVirtualRegister(&AArch64::GPR32RegClass);
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Register DstReg = LoadStore->getOperand(0).getReg();
30103009
LoadStore->getOperand(0).setReg(LdReg);

llvm/test/CodeGen/AArch64/GlobalISel/select-atomic-load-store.mir

Lines changed: 4 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -9,11 +9,6 @@
99
ret i8 %v
1010
}
1111

12-
define i32 @anyext_load_monotonic_i32() {
13-
%v = load atomic i32, ptr null monotonic, align 4
14-
ret i32 %v
15-
}
16-
1712
...
1813
---
1914
name: load_acq_i8
@@ -30,33 +25,13 @@ body: |
3025
3126
; CHECK-LABEL: name: load_acq_i8
3227
; CHECK: liveins: $x0
33-
; CHECK-NEXT: {{ $}}
34-
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
35-
; CHECK-NEXT: [[LDARB:%[0-9]+]]:gpr32 = LDARB [[COPY]] :: (load acquire (s8) from %ir.ptr, align 8)
36-
; CHECK-NEXT: $w0 = COPY [[LDARB]]
37-
; CHECK-NEXT: RET_ReallyLR implicit $w0
28+
; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
29+
; CHECK: [[LDARB:%[0-9]+]]:gpr32 = LDARB [[COPY]] :: (load acquire (s8) from %ir.ptr, align 8)
30+
; CHECK: $w0 = COPY [[LDARB]]
31+
; CHECK: RET_ReallyLR implicit $w0
3832
%0:gpr(p0) = COPY $x0
3933
%2:gpr(s32) = G_LOAD %0(p0) :: (load acquire (s8) from %ir.ptr, align 8)
4034
$w0 = COPY %2(s32)
4135
RET_ReallyLR implicit $w0
4236
4337
...
44-
---
45-
name: anyext_load_monotonic_i32
46-
legalized: true
47-
regBankSelected: true
48-
tracksRegLiveness: true
49-
body: |
50-
bb.1:
51-
; CHECK-LABEL: name: anyext_load_monotonic_i32
52-
; CHECK: [[COPY:%[0-9]+]]:gpr64common = COPY $xzr
53-
; CHECK-NEXT: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui [[COPY]], 0 :: (load monotonic (s32) from `ptr null`)
54-
; CHECK-NEXT: %ld:gpr64all = SUBREG_TO_REG 0, [[LDRWui]], %subreg.sub_32
55-
; CHECK-NEXT: $x0 = COPY %ld
56-
; CHECK-NEXT: RET_ReallyLR implicit $x0
57-
%1:gpr(p0) = G_CONSTANT i64 0
58-
%ld:gpr(s64) = G_LOAD %1(p0) :: (load monotonic (s32) from `ptr null`)
59-
$x0 = COPY %ld(s64)
60-
RET_ReallyLR implicit $x0
61-
62-
...

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