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TTI: Check legalization cost of mul overflow ISD nodes
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2 files changed

+40
-35
lines changed

2 files changed

+40
-35
lines changed

‎llvm/include/llvm/CodeGen/BasicTTIImpl.h

Lines changed: 36 additions & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -2192,37 +2192,11 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
21922192
ISD = ISD::USUBO;
21932193
break;
21942194
case Intrinsic::smul_with_overflow:
2195-
case Intrinsic::umul_with_overflow: {
2196-
Type *MulTy = RetTy->getContainedType(0);
2197-
Type *OverflowTy = RetTy->getContainedType(1);
2198-
unsigned ExtSize = MulTy->getScalarSizeInBits() * 2;
2199-
Type *ExtTy = MulTy->getWithNewBitWidth(ExtSize);
2200-
bool IsSigned = IID == Intrinsic::smul_with_overflow;
2201-
2202-
unsigned ExtOp = IsSigned ? Instruction::SExt : Instruction::ZExt;
2203-
TTI::CastContextHint CCH = TTI::CastContextHint::None;
2204-
2205-
InstructionCost Cost = 0;
2206-
Cost += 2 * thisT()->getCastInstrCost(ExtOp, ExtTy, MulTy, CCH, CostKind);
2207-
Cost +=
2208-
thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind);
2209-
Cost += 2 * thisT()->getCastInstrCost(Instruction::Trunc, MulTy, ExtTy,
2210-
CCH, CostKind);
2211-
Cost += thisT()->getArithmeticInstrCost(Instruction::LShr, ExtTy,
2212-
CostKind,
2213-
{TTI::OK_AnyValue, TTI::OP_None},
2214-
{TTI::OK_UniformConstantValue, TTI::OP_None});
2215-
2216-
if (IsSigned)
2217-
Cost += thisT()->getArithmeticInstrCost(Instruction::AShr, MulTy,
2218-
CostKind,
2219-
{TTI::OK_AnyValue, TTI::OP_None},
2220-
{TTI::OK_UniformConstantValue, TTI::OP_None});
2221-
2222-
Cost += thisT()->getCmpSelInstrCost(
2223-
BinaryOperator::ICmp, MulTy, OverflowTy, CmpInst::ICMP_NE, CostKind);
2224-
return Cost;
2225-
}
2195+
ISD = ISD::SMULO;
2196+
break;
2197+
case Intrinsic::umul_with_overflow:
2198+
ISD = ISD::UMULO;
2199+
break;
22262200
case Intrinsic::fptosi_sat:
22272201
case Intrinsic::fptoui_sat: {
22282202
if (Tys.empty())
@@ -2367,6 +2341,37 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
23672341
OverflowTy, Pred, CostKind);
23682342
return Cost;
23692343
}
2344+
case Intrinsic::smul_with_overflow:
2345+
case Intrinsic::umul_with_overflow: {
2346+
Type *MulTy = RetTy->getContainedType(0);
2347+
Type *OverflowTy = RetTy->getContainedType(1);
2348+
unsigned ExtSize = MulTy->getScalarSizeInBits() * 2;
2349+
Type *ExtTy = MulTy->getWithNewBitWidth(ExtSize);
2350+
bool IsSigned = IID == Intrinsic::smul_with_overflow;
2351+
2352+
unsigned ExtOp = IsSigned ? Instruction::SExt : Instruction::ZExt;
2353+
TTI::CastContextHint CCH = TTI::CastContextHint::None;
2354+
2355+
InstructionCost Cost = 0;
2356+
Cost += 2 * thisT()->getCastInstrCost(ExtOp, ExtTy, MulTy, CCH, CostKind);
2357+
Cost +=
2358+
thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind);
2359+
Cost += 2 * thisT()->getCastInstrCost(Instruction::Trunc, MulTy, ExtTy,
2360+
CCH, CostKind);
2361+
Cost += thisT()->getArithmeticInstrCost(
2362+
Instruction::LShr, ExtTy, CostKind, {TTI::OK_AnyValue, TTI::OP_None},
2363+
{TTI::OK_UniformConstantValue, TTI::OP_None});
2364+
2365+
if (IsSigned)
2366+
Cost += thisT()->getArithmeticInstrCost(
2367+
Instruction::AShr, MulTy, CostKind,
2368+
{TTI::OK_AnyValue, TTI::OP_None},
2369+
{TTI::OK_UniformConstantValue, TTI::OP_None});
2370+
2371+
Cost += thisT()->getCmpSelInstrCost(
2372+
BinaryOperator::ICmp, MulTy, OverflowTy, CmpInst::ICMP_NE, CostKind);
2373+
return Cost;
2374+
}
23702375
case Intrinsic::sadd_sat:
23712376
case Intrinsic::ssub_sat: {
23722377
// Assume a default expansion.

‎llvm/test/Analysis/CostModel/X86/arith-overflow.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1080,7 +1080,7 @@ define i32 @smul(i32 %arg) {
10801080
; AVX512F-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %I8 = call { i8, i1 } @llvm.smul.with.overflow.i8(i8 undef, i8 undef)
10811081
; AVX512F-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V16I8 = call { <16 x i8>, <16 x i1> } @llvm.smul.with.overflow.v16i8(<16 x i8> undef, <16 x i8> undef)
10821082
; AVX512F-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %V32I8 = call { <32 x i8>, <32 x i1> } @llvm.smul.with.overflow.v32i8(<32 x i8> undef, <32 x i8> undef)
1083-
; AVX512F-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %V64I8 = call { <64 x i8>, <64 x i1> } @llvm.smul.with.overflow.v64i8(<64 x i8> undef, <64 x i8> undef)
1083+
; AVX512F-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V64I8 = call { <64 x i8>, <64 x i1> } @llvm.smul.with.overflow.v64i8(<64 x i8> undef, <64 x i8> undef)
10841084
; AVX512F-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
10851085
;
10861086
; AVX512BW-LABEL: 'smul'
@@ -1118,7 +1118,7 @@ define i32 @smul(i32 %arg) {
11181118
; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %I8 = call { i8, i1 } @llvm.smul.with.overflow.i8(i8 undef, i8 undef)
11191119
; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V16I8 = call { <16 x i8>, <16 x i1> } @llvm.smul.with.overflow.v16i8(<16 x i8> undef, <16 x i8> undef)
11201120
; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %V32I8 = call { <32 x i8>, <32 x i1> } @llvm.smul.with.overflow.v32i8(<32 x i8> undef, <32 x i8> undef)
1121-
; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 67 for instruction: %V64I8 = call { <64 x i8>, <64 x i1> } @llvm.smul.with.overflow.v64i8(<64 x i8> undef, <64 x i8> undef)
1121+
; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V64I8 = call { <64 x i8>, <64 x i1> } @llvm.smul.with.overflow.v64i8(<64 x i8> undef, <64 x i8> undef)
11221122
; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
11231123
;
11241124
; SLM-LABEL: 'smul'
@@ -1318,7 +1318,7 @@ define i32 @umul(i32 %arg) {
13181318
; AVX512F-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %I8 = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 undef, i8 undef)
13191319
; AVX512F-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V16I8 = call { <16 x i8>, <16 x i1> } @llvm.umul.with.overflow.v16i8(<16 x i8> undef, <16 x i8> undef)
13201320
; AVX512F-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %V32I8 = call { <32 x i8>, <32 x i1> } @llvm.umul.with.overflow.v32i8(<32 x i8> undef, <32 x i8> undef)
1321-
; AVX512F-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V64I8 = call { <64 x i8>, <64 x i1> } @llvm.umul.with.overflow.v64i8(<64 x i8> undef, <64 x i8> undef)
1321+
; AVX512F-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V64I8 = call { <64 x i8>, <64 x i1> } @llvm.umul.with.overflow.v64i8(<64 x i8> undef, <64 x i8> undef)
13221322
; AVX512F-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
13231323
;
13241324
; AVX512BW-LABEL: 'umul'
@@ -1356,7 +1356,7 @@ define i32 @umul(i32 %arg) {
13561356
; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %I8 = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 undef, i8 undef)
13571357
; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V16I8 = call { <16 x i8>, <16 x i1> } @llvm.umul.with.overflow.v16i8(<16 x i8> undef, <16 x i8> undef)
13581358
; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %V32I8 = call { <32 x i8>, <32 x i1> } @llvm.umul.with.overflow.v32i8(<32 x i8> undef, <32 x i8> undef)
1359-
; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V64I8 = call { <64 x i8>, <64 x i1> } @llvm.umul.with.overflow.v64i8(<64 x i8> undef, <64 x i8> undef)
1359+
; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V64I8 = call { <64 x i8>, <64 x i1> } @llvm.umul.with.overflow.v64i8(<64 x i8> undef, <64 x i8> undef)
13601360
; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
13611361
;
13621362
; SLM-LABEL: 'umul'

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