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[DAG] isKnownToBeAPowerOfTwo - use sd_match to match both commutations of x & -x pattern`. NFC.
Allows us to remove some tricky commutation matching
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-15
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llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Lines changed: 11 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -37,6 +37,7 @@
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineMemOperand.h"
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#include "llvm/CodeGen/RuntimeLibcalls.h"
40+
#include "llvm/CodeGen/SDPatternMatch.h"
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#include "llvm/CodeGen/SelectionDAGAddressAnalysis.h"
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#include "llvm/CodeGen/SelectionDAGNodes.h"
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#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
@@ -81,6 +82,7 @@
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#include <vector>
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using namespace llvm;
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using namespace llvm::SDPatternMatch;
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/// makeVTList - Return an instance of the SDVTList struct initialized with the
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/// specified members.
@@ -4290,21 +4292,15 @@ bool SelectionDAG::isKnownToBeAPowerOfTwo(SDValue Val, unsigned Depth) const {
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return isKnownToBeAPowerOfTwo(Val.getOperand(2), Depth + 1) &&
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isKnownToBeAPowerOfTwo(Val.getOperand(1), Depth + 1);
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4293-
if (Val.getOpcode() == ISD::AND) {
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// Looking for `x & -x` pattern:
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// If x == 0:
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// x & -x -> 0
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// If x != 0:
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// x & -x -> non-zero pow2
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// so if we find the pattern return whether we know `x` is non-zero.
4300-
for (unsigned OpIdx = 0; OpIdx < 2; ++OpIdx) {
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SDValue NegOp = Val.getOperand(OpIdx);
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if (NegOp.getOpcode() == ISD::SUB &&
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NegOp.getOperand(1) == Val.getOperand(1 - OpIdx) &&
4304-
isNullOrNullSplat(NegOp.getOperand(0)))
4305-
return isKnownNeverZero(Val.getOperand(1 - OpIdx), Depth);
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}
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}
4295+
// Looking for `x & -x` pattern:
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// If x == 0:
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// x & -x -> 0
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// If x != 0:
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// x & -x -> non-zero pow2
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// so if we find the pattern return whether we know `x` is non-zero.
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SDValue X;
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if (sd_match(Val, m_And(m_Value(X), m_Sub(m_Zero(), m_Deferred(X)))))
4303+
return isKnownNeverZero(X, Depth);
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if (Val.getOpcode() == ISD::ZERO_EXTEND)
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return isKnownToBeAPowerOfTwo(Val.getOperand(0), Depth + 1);

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