@@ -1829,6 +1829,194 @@ exit: ; preds = %for.body
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ret i64 %spec.select
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}
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+ @table = constant [13 x i16 ] [i16 10 , i16 35 , i16 69 , i16 147 , i16 280 , i16 472 , i16 682 , i16 1013 , i16 1559 , i16 2544 , i16 4553 , i16 6494 , i16 10000 ], align 1
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+
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+ define i16 @not_vectorized_select_decreasing_induction_icmp_table_i16 (i16 noundef %val ) {
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+ ; CHECK-LABEL: define i16 @non_reduction_index(
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+ ; CHECK-SAME: i16 noundef [[VAL:%.*]]) {
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+ ; CHECK-NEXT: [[ENTRY:.*]]:
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+ ; CHECK-NEXT: br label %[[FOR_BODY:.*]]
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+ ; CHECK: [[FOR_COND_CLEANUP:.*]]:
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+ ; CHECK-NEXT: [[SPEC_SELECT_LCSSA:%.*]] = phi i16 [ [[SPEC_SELECT:%.*]], %[[FOR_BODY]] ]
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+ ; CHECK-NEXT: ret i16 [[SPEC_SELECT_LCSSA]]
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+ ; CHECK: [[FOR_BODY]]:
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+ ; CHECK-NEXT: [[I_05:%.*]] = phi i16 [ 12, %[[ENTRY]] ], [ [[SUB:%.*]], %[[FOR_BODY]] ]
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+ ; CHECK-NEXT: [[K_04:%.*]] = phi i16 [ 0, %[[ENTRY]] ], [ [[SPEC_SELECT]], %[[FOR_BODY]] ]
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+ ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [13 x i16], ptr @table, i16 0, i16 [[I_05]]
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+ ; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[ARRAYIDX]], align 1
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+ ; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt i16 [[TMP0]], [[VAL]]
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+ ; CHECK-NEXT: [[SUB]] = add nsw i16 [[I_05]], -1
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+ ; CHECK-NEXT: [[SPEC_SELECT]] = select i1 [[CMP1]], i16 [[SUB]], i16 [[K_04]]
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+ ; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i16 [[SUB]], 0
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+ ; CHECK-NEXT: br i1 [[CMP_NOT]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]]
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+ ;
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+ ; CHECK-VF4IC1-LABEL: define i16 @not_vectorized_select_decreasing_induction_icmp_table_i16(
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+ ; CHECK-VF4IC1-SAME: i16 noundef [[VAL:%.*]]) {
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+ ; CHECK-VF4IC1-NEXT: [[ENTRY:.*]]:
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+ ; CHECK-VF4IC1-NEXT: br label %[[FOR_BODY:.*]]
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+ ; CHECK-VF4IC1: [[FOR_COND_CLEANUP:.*]]:
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+ ; CHECK-VF4IC1-NEXT: [[SPEC_SELECT_LCSSA:%.*]] = phi i16 [ [[SPEC_SELECT:%.*]], %[[FOR_BODY]] ]
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+ ; CHECK-VF4IC1-NEXT: ret i16 [[SPEC_SELECT_LCSSA]]
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+ ; CHECK-VF4IC1: [[FOR_BODY]]:
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+ ; CHECK-VF4IC1-NEXT: [[I_05:%.*]] = phi i16 [ 12, %[[ENTRY]] ], [ [[SUB:%.*]], %[[FOR_BODY]] ]
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+ ; CHECK-VF4IC1-NEXT: [[K_04:%.*]] = phi i16 [ 0, %[[ENTRY]] ], [ [[SPEC_SELECT]], %[[FOR_BODY]] ]
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+ ; CHECK-VF4IC1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [13 x i16], ptr @table, i16 0, i16 [[I_05]]
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+ ; CHECK-VF4IC1-NEXT: [[TMP0:%.*]] = load i16, ptr [[ARRAYIDX]], align 1
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+ ; CHECK-VF4IC1-NEXT: [[CMP1:%.*]] = icmp ugt i16 [[TMP0]], [[VAL]]
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+ ; CHECK-VF4IC1-NEXT: [[SUB]] = add nsw i16 [[I_05]], -1
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+ ; CHECK-VF4IC1-NEXT: [[SPEC_SELECT]] = select i1 [[CMP1]], i16 [[SUB]], i16 [[K_04]]
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+ ; CHECK-VF4IC1-NEXT: [[CMP_NOT:%.*]] = icmp eq i16 [[SUB]], 0
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+ ; CHECK-VF4IC1-NEXT: br i1 [[CMP_NOT]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]]
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+ ;
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+ ; CHECK-VF4IC4-LABEL: define i16 @not_vectorized_select_decreasing_induction_icmp_table_i16(
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+ ; CHECK-VF4IC4-SAME: i16 noundef [[VAL:%.*]]) {
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+ ; CHECK-VF4IC4-NEXT: [[ENTRY:.*]]:
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+ ; CHECK-VF4IC4-NEXT: br label %[[FOR_BODY:.*]]
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+ ; CHECK-VF4IC4: [[FOR_COND_CLEANUP:.*]]:
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+ ; CHECK-VF4IC4-NEXT: [[SPEC_SELECT_LCSSA:%.*]] = phi i16 [ [[SPEC_SELECT:%.*]], %[[FOR_BODY]] ]
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+ ; CHECK-VF4IC4-NEXT: ret i16 [[SPEC_SELECT_LCSSA]]
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+ ; CHECK-VF4IC4: [[FOR_BODY]]:
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+ ; CHECK-VF4IC4-NEXT: [[I_05:%.*]] = phi i16 [ 12, %[[ENTRY]] ], [ [[SUB:%.*]], %[[FOR_BODY]] ]
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+ ; CHECK-VF4IC4-NEXT: [[K_04:%.*]] = phi i16 [ 0, %[[ENTRY]] ], [ [[SPEC_SELECT]], %[[FOR_BODY]] ]
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+ ; CHECK-VF4IC4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [13 x i16], ptr @table, i16 0, i16 [[I_05]]
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+ ; CHECK-VF4IC4-NEXT: [[TMP0:%.*]] = load i16, ptr [[ARRAYIDX]], align 1
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+ ; CHECK-VF4IC4-NEXT: [[CMP1:%.*]] = icmp ugt i16 [[TMP0]], [[VAL]]
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+ ; CHECK-VF4IC4-NEXT: [[SUB]] = add nsw i16 [[I_05]], -1
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+ ; CHECK-VF4IC4-NEXT: [[SPEC_SELECT]] = select i1 [[CMP1]], i16 [[SUB]], i16 [[K_04]]
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+ ; CHECK-VF4IC4-NEXT: [[CMP_NOT:%.*]] = icmp eq i16 [[SUB]], 0
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+ ; CHECK-VF4IC4-NEXT: br i1 [[CMP_NOT]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]]
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+ ;
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+ ; CHECK-VF1IC4-LABEL: define i16 @not_vectorized_select_decreasing_induction_icmp_table_i16(
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+ ; CHECK-VF1IC4-SAME: i16 noundef [[VAL:%.*]]) {
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+ ; CHECK-VF1IC4-NEXT: [[ENTRY:.*]]:
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+ ; CHECK-VF1IC4-NEXT: br label %[[FOR_BODY:.*]]
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+ ; CHECK-VF1IC4: [[FOR_COND_CLEANUP:.*]]:
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+ ; CHECK-VF1IC4-NEXT: [[SPEC_SELECT_LCSSA:%.*]] = phi i16 [ [[SPEC_SELECT:%.*]], %[[FOR_BODY]] ]
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+ ; CHECK-VF1IC4-NEXT: ret i16 [[SPEC_SELECT_LCSSA]]
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+ ; CHECK-VF1IC4: [[FOR_BODY]]:
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+ ; CHECK-VF1IC4-NEXT: [[I_05:%.*]] = phi i16 [ 12, %[[ENTRY]] ], [ [[SUB:%.*]], %[[FOR_BODY]] ]
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+ ; CHECK-VF1IC4-NEXT: [[K_04:%.*]] = phi i16 [ 0, %[[ENTRY]] ], [ [[SPEC_SELECT]], %[[FOR_BODY]] ]
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+ ; CHECK-VF1IC4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [13 x i16], ptr @table, i16 0, i16 [[I_05]]
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+ ; CHECK-VF1IC4-NEXT: [[TMP0:%.*]] = load i16, ptr [[ARRAYIDX]], align 1
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+ ; CHECK-VF1IC4-NEXT: [[CMP1:%.*]] = icmp ugt i16 [[TMP0]], [[VAL]]
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+ ; CHECK-VF1IC4-NEXT: [[SUB]] = add nsw i16 [[I_05]], -1
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+ ; CHECK-VF1IC4-NEXT: [[SPEC_SELECT]] = select i1 [[CMP1]], i16 [[SUB]], i16 [[K_04]]
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+ ; CHECK-VF1IC4-NEXT: [[CMP_NOT:%.*]] = icmp eq i16 [[SUB]], 0
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+ ; CHECK-VF1IC4-NEXT: br i1 [[CMP_NOT]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]]
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+ ;
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+ entry:
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+ br label %for.body
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+
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+ for.cond.cleanup: ; preds = %for.body
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+ %spec.select.lcssa = phi i16 [ %spec.select , %for.body ]
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+ ret i16 %spec.select.lcssa
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+
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+ for.body: ; preds = %entry, %for.body
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+ %i.05 = phi i16 [ 12 , %entry ], [ %sub , %for.body ]
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+ %k.04 = phi i16 [ 0 , %entry ], [ %spec.select , %for.body ]
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+ %arrayidx = getelementptr inbounds [13 x i16 ], ptr @table , i16 0 , i16 %i.05
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+ %0 = load i16 , ptr %arrayidx , align 1
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+ %cmp1 = icmp ugt i16 %0 , %val
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+ %sub = add nsw i16 %i.05 , -1
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+ %spec.select = select i1 %cmp1 , i16 %sub , i16 %k.04
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+ %cmp.not = icmp eq i16 %sub , 0
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+ br i1 %cmp.not , label %for.cond.cleanup , label %for.body
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+ }
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+
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+ @tablef = constant [13 x half ] [half 10 .0 , half 35 .0 , half 69 .0 , half 147 .0 , half 280 .0 , half 472 .0 , half 682 .0 , half 1013 .0 , half 1559 .0 , half 2544 .0 , half 4556 .0 , half 6496 .0 , half 10000 .0 ], align 1
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+
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+ define i16 @not_vectorized_select_decreasing_induction_icmp_table_half (half noundef %val ) {
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+ ; CHECK-LABEL: define i16 @non_reduction_index_half(
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+ ; CHECK-SAME: half noundef [[VAL:%.*]]) {
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+ ; CHECK-NEXT: [[ENTRY:.*]]:
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+ ; CHECK-NEXT: br label %[[FOR_BODY:.*]]
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+ ; CHECK: [[FOR_COND_CLEANUP:.*]]:
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+ ; CHECK-NEXT: [[SPEC_SELECT_LCSSA:%.*]] = phi i16 [ [[SPEC_SELECT:%.*]], %[[FOR_BODY]] ]
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+ ; CHECK-NEXT: ret i16 [[SPEC_SELECT_LCSSA]]
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+ ; CHECK: [[FOR_BODY]]:
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+ ; CHECK-NEXT: [[I_05:%.*]] = phi i16 [ 12, %[[ENTRY]] ], [ [[SUB:%.*]], %[[FOR_BODY]] ]
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+ ; CHECK-NEXT: [[K_04:%.*]] = phi i16 [ 0, %[[ENTRY]] ], [ [[SPEC_SELECT]], %[[FOR_BODY]] ]
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+ ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [13 x i16], ptr @table, i16 0, i16 [[I_05]]
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+ ; CHECK-NEXT: [[TMP0:%.*]] = load half, ptr [[ARRAYIDX]], align 1
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+ ; CHECK-NEXT: [[FCMP1:%.*]] = fcmp ugt half [[TMP0]], [[VAL]]
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+ ; CHECK-NEXT: [[SUB]] = add nsw i16 [[I_05]], -1
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+ ; CHECK-NEXT: [[SPEC_SELECT]] = select i1 [[FCMP1]], i16 [[SUB]], i16 [[K_04]]
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+ ; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i16 [[SUB]], 0
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+ ; CHECK-NEXT: br i1 [[CMP_NOT]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]]
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+ ;
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+ ; CHECK-VF4IC1-LABEL: define i16 @not_vectorized_select_decreasing_induction_icmp_table_half(
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+ ; CHECK-VF4IC1-SAME: half noundef [[VAL:%.*]]) {
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+ ; CHECK-VF4IC1-NEXT: [[ENTRY:.*]]:
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+ ; CHECK-VF4IC1-NEXT: br label %[[FOR_BODY:.*]]
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+ ; CHECK-VF4IC1: [[FOR_COND_CLEANUP:.*]]:
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+ ; CHECK-VF4IC1-NEXT: [[SPEC_SELECT_LCSSA:%.*]] = phi i16 [ [[SPEC_SELECT:%.*]], %[[FOR_BODY]] ]
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+ ; CHECK-VF4IC1-NEXT: ret i16 [[SPEC_SELECT_LCSSA]]
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+ ; CHECK-VF4IC1: [[FOR_BODY]]:
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+ ; CHECK-VF4IC1-NEXT: [[I_05:%.*]] = phi i16 [ 12, %[[ENTRY]] ], [ [[SUB:%.*]], %[[FOR_BODY]] ]
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+ ; CHECK-VF4IC1-NEXT: [[K_04:%.*]] = phi i16 [ 0, %[[ENTRY]] ], [ [[SPEC_SELECT]], %[[FOR_BODY]] ]
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+ ; CHECK-VF4IC1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [13 x i16], ptr @table, i16 0, i16 [[I_05]]
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+ ; CHECK-VF4IC1-NEXT: [[TMP0:%.*]] = load half, ptr [[ARRAYIDX]], align 1
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+ ; CHECK-VF4IC1-NEXT: [[FCMP1:%.*]] = fcmp ugt half [[TMP0]], [[VAL]]
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+ ; CHECK-VF4IC1-NEXT: [[SUB]] = add nsw i16 [[I_05]], -1
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+ ; CHECK-VF4IC1-NEXT: [[SPEC_SELECT]] = select i1 [[FCMP1]], i16 [[SUB]], i16 [[K_04]]
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+ ; CHECK-VF4IC1-NEXT: [[CMP_NOT:%.*]] = icmp eq i16 [[SUB]], 0
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+ ; CHECK-VF4IC1-NEXT: br i1 [[CMP_NOT]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]]
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+ ;
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+ ; CHECK-VF4IC4-LABEL: define i16 @not_vectorized_select_decreasing_induction_icmp_table_half(
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+ ; CHECK-VF4IC4-SAME: half noundef [[VAL:%.*]]) {
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+ ; CHECK-VF4IC4-NEXT: [[ENTRY:.*]]:
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+ ; CHECK-VF4IC4-NEXT: br label %[[FOR_BODY:.*]]
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+ ; CHECK-VF4IC4: [[FOR_COND_CLEANUP:.*]]:
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+ ; CHECK-VF4IC4-NEXT: [[SPEC_SELECT_LCSSA:%.*]] = phi i16 [ [[SPEC_SELECT:%.*]], %[[FOR_BODY]] ]
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+ ; CHECK-VF4IC4-NEXT: ret i16 [[SPEC_SELECT_LCSSA]]
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+ ; CHECK-VF4IC4: [[FOR_BODY]]:
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+ ; CHECK-VF4IC4-NEXT: [[I_05:%.*]] = phi i16 [ 12, %[[ENTRY]] ], [ [[SUB:%.*]], %[[FOR_BODY]] ]
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+ ; CHECK-VF4IC4-NEXT: [[K_04:%.*]] = phi i16 [ 0, %[[ENTRY]] ], [ [[SPEC_SELECT]], %[[FOR_BODY]] ]
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+ ; CHECK-VF4IC4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [13 x i16], ptr @table, i16 0, i16 [[I_05]]
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+ ; CHECK-VF4IC4-NEXT: [[TMP0:%.*]] = load half, ptr [[ARRAYIDX]], align 1
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+ ; CHECK-VF4IC4-NEXT: [[FCMP1:%.*]] = fcmp ugt half [[TMP0]], [[VAL]]
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+ ; CHECK-VF4IC4-NEXT: [[SUB]] = add nsw i16 [[I_05]], -1
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+ ; CHECK-VF4IC4-NEXT: [[SPEC_SELECT]] = select i1 [[FCMP1]], i16 [[SUB]], i16 [[K_04]]
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+ ; CHECK-VF4IC4-NEXT: [[CMP_NOT:%.*]] = icmp eq i16 [[SUB]], 0
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+ ; CHECK-VF4IC4-NEXT: br i1 [[CMP_NOT]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]]
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+ ;
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+ ; CHECK-VF1IC4-LABEL: define i16 @not_vectorized_select_decreasing_induction_icmp_table_half(
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+ ; CHECK-VF1IC4-SAME: half noundef [[VAL:%.*]]) {
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+ ; CHECK-VF1IC4-NEXT: [[ENTRY:.*]]:
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+ ; CHECK-VF1IC4-NEXT: br label %[[FOR_BODY:.*]]
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+ ; CHECK-VF1IC4: [[FOR_COND_CLEANUP:.*]]:
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+ ; CHECK-VF1IC4-NEXT: [[SPEC_SELECT_LCSSA:%.*]] = phi i16 [ [[SPEC_SELECT:%.*]], %[[FOR_BODY]] ]
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+ ; CHECK-VF1IC4-NEXT: ret i16 [[SPEC_SELECT_LCSSA]]
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+ ; CHECK-VF1IC4: [[FOR_BODY]]:
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+ ; CHECK-VF1IC4-NEXT: [[I_05:%.*]] = phi i16 [ 12, %[[ENTRY]] ], [ [[SUB:%.*]], %[[FOR_BODY]] ]
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+ ; CHECK-VF1IC4-NEXT: [[K_04:%.*]] = phi i16 [ 0, %[[ENTRY]] ], [ [[SPEC_SELECT]], %[[FOR_BODY]] ]
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+ ; CHECK-VF1IC4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [13 x i16], ptr @table, i16 0, i16 [[I_05]]
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+ ; CHECK-VF1IC4-NEXT: [[TMP0:%.*]] = load half, ptr [[ARRAYIDX]], align 1
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+ ; CHECK-VF1IC4-NEXT: [[FCMP1:%.*]] = fcmp ugt half [[TMP0]], [[VAL]]
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+ ; CHECK-VF1IC4-NEXT: [[SUB]] = add nsw i16 [[I_05]], -1
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+ ; CHECK-VF1IC4-NEXT: [[SPEC_SELECT]] = select i1 [[FCMP1]], i16 [[SUB]], i16 [[K_04]]
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+ ; CHECK-VF1IC4-NEXT: [[CMP_NOT:%.*]] = icmp eq i16 [[SUB]], 0
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+ ; CHECK-VF1IC4-NEXT: br i1 [[CMP_NOT]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]]
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+ ;
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+ entry:
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+ br label %for.body
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+
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+ for.cond.cleanup: ; preds = %for.body
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+ %spec.select.lcssa = phi i16 [ %spec.select , %for.body ]
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+ ret i16 %spec.select.lcssa
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+
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+ for.body: ; preds = %entry, %for.body
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+ %i.05 = phi i16 [ 12 , %entry ], [ %sub , %for.body ]
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+ %k.04 = phi i16 [ 0 , %entry ], [ %spec.select , %for.body ]
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+ %arrayidx = getelementptr inbounds [13 x i16 ], ptr @table , i16 0 , i16 %i.05
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+ %0 = load half , ptr %arrayidx , align 1
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+ %fcmp1 = fcmp ugt half %0 , %val
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+ %sub = add nsw i16 %i.05 , -1
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+ %spec.select = select i1 %fcmp1 , i16 %sub , i16 %k.04
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+ %cmp.not = icmp eq i16 %sub , 0
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+ br i1 %cmp.not , label %for.cond.cleanup , label %for.body
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+ }
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+
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define i64 @not_vectorized_select_decreasing_induction_icmp_non_const_start (ptr %a , ptr %b , i64 %rdx.start , i64 %n ) {
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; CHECK-VF4IC1-LABEL: define i64 @not_vectorized_select_decreasing_induction_icmp_non_const_start(
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; CHECK-VF4IC1-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i64 [[RDX_START:%.*]], i64 [[N:%.*]]) {
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