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Kai Luo
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[PowerPC][AIX] Enable quadword atomics by default for AIX
On AIX, a libatomic supporting inline quadword atomic operations has been released, so that compatibility is not an issue now, we can enable quadword atomics by default. Reviewed By: #powerpc, nemanjai Differential Revision: https://reviews.llvm.org/D151312
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‎llvm/docs/ReleaseNotes.rst

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -218,6 +218,11 @@ Changes to the PowerPC Backend
218218
only supported on AIX.
219219
* On AIX, teach the profile runtime to check for a build-id string; such string
220220
can be created by the -mxcoff-build-id option.
221+
* Removed ``-ppc-quadword-atomics`` which only affected lock-free quadword
222+
atomics on AIX. Now backend generates lock-free quadword atomics code on AIX
223+
by default. To support lock-free quadword atomics in libatomic, the OS level
224+
must be at least AIX 7.2 TL5 SP3 with libc++.rte of version 17.1.1 or above
225+
installed.
221226

222227
Changes to the RISC-V Backend
223228
-----------------------------

‎llvm/lib/Target/PowerPC/PPCISelLowering.cpp

Lines changed: 1 addition & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -122,11 +122,6 @@ cl::desc("don't always align innermost loop to 32 bytes on ppc"), cl::Hidden);
122122
static cl::opt<bool> UseAbsoluteJumpTables("ppc-use-absolute-jumptables",
123123
cl::desc("use absolute jump tables on ppc"), cl::Hidden);
124124

125-
static cl::opt<bool> EnableQuadwordAtomics(
126-
"ppc-quadword-atomics",
127-
cl::desc("enable quadword lock-free atomic operations"), cl::init(false),
128-
cl::Hidden);
129-
130125
static cl::opt<bool>
131126
DisablePerfectShuffle("ppc-disable-perfect-shuffle",
132127
cl::desc("disable vector permute decomposition"),
@@ -18479,11 +18474,7 @@ CCAssignFn *PPCTargetLowering::ccAssignFnForCall(CallingConv::ID CC,
1847918474
}
1848018475

1848118476
bool PPCTargetLowering::shouldInlineQuadwordAtomics() const {
18482-
// TODO: 16-byte atomic type support for AIX is in progress; we should be able
18483-
// to inline 16-byte atomic ops on AIX too in the future.
18484-
return Subtarget.isPPC64() &&
18485-
(EnableQuadwordAtomics || !Subtarget.getTargetTriple().isOSAIX()) &&
18486-
Subtarget.hasQuadwordAtomics();
18477+
return Subtarget.isPPC64() && Subtarget.hasQuadwordAtomics();
1848718478
}
1848818479

1848918480
TargetLowering::AtomicExpansionKind

‎llvm/test/CodeGen/PowerPC/atomics-i128-ldst.ll

Lines changed: 54 additions & 137 deletions
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,9 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
22
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-unknown \
33
; RUN: -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-track-subreg-liveness \
4-
; RUN: -ppc-quadword-atomics < %s | FileCheck --check-prefix=P8 %s
4+
; RUN: < %s | FileCheck --check-prefix=P8 %s
55
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-unknown -mcpu=pwr7 \
6-
; RUN: -ppc-asm-full-reg-names -ppc-quadword-atomics \
6+
; RUN: -ppc-asm-full-reg-names \
77
; RUN: -ppc-track-subreg-liveness < %s | FileCheck --check-prefix=PWR7 %s
88
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 \
99
; RUN: -ppc-asm-full-reg-names -ppc-track-subreg-liveness < %s | FileCheck \
@@ -15,7 +15,7 @@
1515
; RUN: -ppc-asm-full-reg-names -ppc-track-subreg-liveness < %s | FileCheck \
1616
; RUN: --check-prefix=AIX64-PWR8 %s
1717
; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-unknown -mcpu=pwr8 \
18-
; RUN: -ppc-quadword-atomics -ppc-asm-full-reg-names -ppc-track-subreg-liveness < %s \
18+
; RUN: -ppc-asm-full-reg-names -ppc-track-subreg-liveness < %s \
1919
; RUN: | FileCheck --check-prefix=PPC-PWR8 %s
2020

2121
define dso_local i128 @lq_unordered(ptr %src) {
@@ -49,15 +49,9 @@ define dso_local i128 @lq_unordered(ptr %src) {
4949
;
5050
; AIX64-PWR8-LABEL: lq_unordered:
5151
; AIX64-PWR8: # %bb.0: # %entry
52-
; AIX64-PWR8-NEXT: mflr r0
53-
; AIX64-PWR8-NEXT: stdu r1, -112(r1)
54-
; AIX64-PWR8-NEXT: li r4, 0
55-
; AIX64-PWR8-NEXT: std r0, 128(r1)
56-
; AIX64-PWR8-NEXT: bl .__atomic_load_16[PR]
57-
; AIX64-PWR8-NEXT: nop
58-
; AIX64-PWR8-NEXT: addi r1, r1, 112
59-
; AIX64-PWR8-NEXT: ld r0, 16(r1)
60-
; AIX64-PWR8-NEXT: mtlr r0
52+
; AIX64-PWR8-NEXT: lq r4, 0(r3)
53+
; AIX64-PWR8-NEXT: mr r3, r4
54+
; AIX64-PWR8-NEXT: mr r4, r5
6155
; AIX64-PWR8-NEXT: blr
6256
;
6357
; PPC-PWR8-LABEL: lq_unordered:
@@ -124,17 +118,11 @@ define dso_local i128 @lqx_unordered(ptr %src, i64 %idx) {
124118
;
125119
; AIX64-PWR8-LABEL: lqx_unordered:
126120
; AIX64-PWR8: # %bb.0: # %entry
127-
; AIX64-PWR8-NEXT: mflr r0
128-
; AIX64-PWR8-NEXT: stdu r1, -112(r1)
129121
; AIX64-PWR8-NEXT: sldi r4, r4, 4
130-
; AIX64-PWR8-NEXT: std r0, 128(r1)
131122
; AIX64-PWR8-NEXT: add r3, r3, r4
132-
; AIX64-PWR8-NEXT: li r4, 0
133-
; AIX64-PWR8-NEXT: bl .__atomic_load_16[PR]
134-
; AIX64-PWR8-NEXT: nop
135-
; AIX64-PWR8-NEXT: addi r1, r1, 112
136-
; AIX64-PWR8-NEXT: ld r0, 16(r1)
137-
; AIX64-PWR8-NEXT: mtlr r0
123+
; AIX64-PWR8-NEXT: lq r4, 0(r3)
124+
; AIX64-PWR8-NEXT: mr r3, r4
125+
; AIX64-PWR8-NEXT: mr r4, r5
138126
; AIX64-PWR8-NEXT: blr
139127
;
140128
; PPC-PWR8-LABEL: lqx_unordered:
@@ -202,16 +190,11 @@ define dso_local i128 @lq_big_offset_unordered(ptr %src) {
202190
;
203191
; AIX64-PWR8-LABEL: lq_big_offset_unordered:
204192
; AIX64-PWR8: # %bb.0: # %entry
205-
; AIX64-PWR8-NEXT: mflr r0
206-
; AIX64-PWR8-NEXT: stdu r1, -112(r1)
207-
; AIX64-PWR8-NEXT: addis r3, r3, 32
208-
; AIX64-PWR8-NEXT: li r4, 0
209-
; AIX64-PWR8-NEXT: std r0, 128(r1)
210-
; AIX64-PWR8-NEXT: bl .__atomic_load_16[PR]
211-
; AIX64-PWR8-NEXT: nop
212-
; AIX64-PWR8-NEXT: addi r1, r1, 112
213-
; AIX64-PWR8-NEXT: ld r0, 16(r1)
214-
; AIX64-PWR8-NEXT: mtlr r0
193+
; AIX64-PWR8-NEXT: lis r4, 32
194+
; AIX64-PWR8-NEXT: add r3, r3, r4
195+
; AIX64-PWR8-NEXT: lq r4, 0(r3)
196+
; AIX64-PWR8-NEXT: mr r3, r4
197+
; AIX64-PWR8-NEXT: mr r4, r5
215198
; AIX64-PWR8-NEXT: blr
216199
;
217200
; PPC-PWR8-LABEL: lq_big_offset_unordered:
@@ -271,15 +254,9 @@ define dso_local i128 @lq_monotonic(ptr %src) {
271254
;
272255
; AIX64-PWR8-LABEL: lq_monotonic:
273256
; AIX64-PWR8: # %bb.0: # %entry
274-
; AIX64-PWR8-NEXT: mflr r0
275-
; AIX64-PWR8-NEXT: stdu r1, -112(r1)
276-
; AIX64-PWR8-NEXT: li r4, 0
277-
; AIX64-PWR8-NEXT: std r0, 128(r1)
278-
; AIX64-PWR8-NEXT: bl .__atomic_load_16[PR]
279-
; AIX64-PWR8-NEXT: nop
280-
; AIX64-PWR8-NEXT: addi r1, r1, 112
281-
; AIX64-PWR8-NEXT: ld r0, 16(r1)
282-
; AIX64-PWR8-NEXT: mtlr r0
257+
; AIX64-PWR8-NEXT: lq r4, 0(r3)
258+
; AIX64-PWR8-NEXT: mr r3, r4
259+
; AIX64-PWR8-NEXT: mr r4, r5
283260
; AIX64-PWR8-NEXT: blr
284261
;
285262
; PPC-PWR8-LABEL: lq_monotonic:
@@ -344,15 +321,12 @@ define dso_local i128 @lq_acquire(ptr %src) {
344321
;
345322
; AIX64-PWR8-LABEL: lq_acquire:
346323
; AIX64-PWR8: # %bb.0: # %entry
347-
; AIX64-PWR8-NEXT: mflr r0
348-
; AIX64-PWR8-NEXT: stdu r1, -112(r1)
349-
; AIX64-PWR8-NEXT: li r4, 2
350-
; AIX64-PWR8-NEXT: std r0, 128(r1)
351-
; AIX64-PWR8-NEXT: bl .__atomic_load_16[PR]
352-
; AIX64-PWR8-NEXT: nop
353-
; AIX64-PWR8-NEXT: addi r1, r1, 112
354-
; AIX64-PWR8-NEXT: ld r0, 16(r1)
355-
; AIX64-PWR8-NEXT: mtlr r0
324+
; AIX64-PWR8-NEXT: lq r4, 0(r3)
325+
; AIX64-PWR8-NEXT: cmpd cr7, r5, r5
326+
; AIX64-PWR8-NEXT: mr r3, r4
327+
; AIX64-PWR8-NEXT: mr r4, r5
328+
; AIX64-PWR8-NEXT: bne- cr7, $+4
329+
; AIX64-PWR8-NEXT: isync
356330
; AIX64-PWR8-NEXT: blr
357331
;
358332
; PPC-PWR8-LABEL: lq_acquire:
@@ -419,15 +393,13 @@ define dso_local i128 @lq_seqcst(ptr %src) {
419393
;
420394
; AIX64-PWR8-LABEL: lq_seqcst:
421395
; AIX64-PWR8: # %bb.0: # %entry
422-
; AIX64-PWR8-NEXT: mflr r0
423-
; AIX64-PWR8-NEXT: stdu r1, -112(r1)
424-
; AIX64-PWR8-NEXT: li r4, 5
425-
; AIX64-PWR8-NEXT: std r0, 128(r1)
426-
; AIX64-PWR8-NEXT: bl .__atomic_load_16[PR]
427-
; AIX64-PWR8-NEXT: nop
428-
; AIX64-PWR8-NEXT: addi r1, r1, 112
429-
; AIX64-PWR8-NEXT: ld r0, 16(r1)
430-
; AIX64-PWR8-NEXT: mtlr r0
396+
; AIX64-PWR8-NEXT: sync
397+
; AIX64-PWR8-NEXT: lq r4, 0(r3)
398+
; AIX64-PWR8-NEXT: cmpd cr7, r5, r5
399+
; AIX64-PWR8-NEXT: mr r3, r4
400+
; AIX64-PWR8-NEXT: mr r4, r5
401+
; AIX64-PWR8-NEXT: bne- cr7, $+4
402+
; AIX64-PWR8-NEXT: isync
431403
; AIX64-PWR8-NEXT: blr
432404
;
433405
; PPC-PWR8-LABEL: lq_seqcst:
@@ -491,19 +463,9 @@ define dso_local void @stq_unordered(i128 %val, ptr %dst) {
491463
;
492464
; AIX64-PWR8-LABEL: stq_unordered:
493465
; AIX64-PWR8: # %bb.0: # %entry
494-
; AIX64-PWR8-NEXT: mflr r0
495-
; AIX64-PWR8-NEXT: stdu r1, -112(r1)
496-
; AIX64-PWR8-NEXT: mr r6, r4
497-
; AIX64-PWR8-NEXT: mr r4, r3
498-
; AIX64-PWR8-NEXT: mr r3, r5
499-
; AIX64-PWR8-NEXT: std r0, 128(r1)
500-
; AIX64-PWR8-NEXT: mr r5, r6
501-
; AIX64-PWR8-NEXT: li r6, 0
502-
; AIX64-PWR8-NEXT: bl .__atomic_store_16[PR]
503-
; AIX64-PWR8-NEXT: nop
504-
; AIX64-PWR8-NEXT: addi r1, r1, 112
505-
; AIX64-PWR8-NEXT: ld r0, 16(r1)
506-
; AIX64-PWR8-NEXT: mtlr r0
466+
; AIX64-PWR8-NEXT: mr r7, r4
467+
; AIX64-PWR8-NEXT: mr r6, r3
468+
; AIX64-PWR8-NEXT: stq r6, 0(r5)
507469
; AIX64-PWR8-NEXT: blr
508470
;
509471
; PPC-PWR8-LABEL: stq_unordered:
@@ -572,20 +534,11 @@ define dso_local void @stqx_unordered(i128 %val, ptr %dst, i64 %idx) {
572534
;
573535
; AIX64-PWR8-LABEL: stqx_unordered:
574536
; AIX64-PWR8: # %bb.0: # %entry
575-
; AIX64-PWR8-NEXT: mflr r0
576-
; AIX64-PWR8-NEXT: stdu r1, -112(r1)
577-
; AIX64-PWR8-NEXT: mr r7, r4
578-
; AIX64-PWR8-NEXT: mr r4, r3
579-
; AIX64-PWR8-NEXT: std r0, 128(r1)
580-
; AIX64-PWR8-NEXT: sldi r3, r6, 4
581-
; AIX64-PWR8-NEXT: li r6, 0
582-
; AIX64-PWR8-NEXT: add r3, r5, r3
583-
; AIX64-PWR8-NEXT: mr r5, r7
584-
; AIX64-PWR8-NEXT: bl .__atomic_store_16[PR]
585-
; AIX64-PWR8-NEXT: nop
586-
; AIX64-PWR8-NEXT: addi r1, r1, 112
587-
; AIX64-PWR8-NEXT: ld r0, 16(r1)
588-
; AIX64-PWR8-NEXT: mtlr r0
537+
; AIX64-PWR8-NEXT: sldi r6, r6, 4
538+
; AIX64-PWR8-NEXT: mr r9, r4
539+
; AIX64-PWR8-NEXT: mr r8, r3
540+
; AIX64-PWR8-NEXT: add r3, r5, r6
541+
; AIX64-PWR8-NEXT: stq r8, 0(r3)
589542
; AIX64-PWR8-NEXT: blr
590543
;
591544
; PPC-PWR8-LABEL: stqx_unordered:
@@ -656,19 +609,11 @@ define dso_local void @stq_big_offset_unordered(i128 %val, ptr %dst) {
656609
;
657610
; AIX64-PWR8-LABEL: stq_big_offset_unordered:
658611
; AIX64-PWR8: # %bb.0: # %entry
659-
; AIX64-PWR8-NEXT: mflr r0
660-
; AIX64-PWR8-NEXT: stdu r1, -112(r1)
661-
; AIX64-PWR8-NEXT: mr r6, r4
662-
; AIX64-PWR8-NEXT: mr r4, r3
663-
; AIX64-PWR8-NEXT: addis r3, r5, 32
664-
; AIX64-PWR8-NEXT: std r0, 128(r1)
665-
; AIX64-PWR8-NEXT: mr r5, r6
666-
; AIX64-PWR8-NEXT: li r6, 0
667-
; AIX64-PWR8-NEXT: bl .__atomic_store_16[PR]
668-
; AIX64-PWR8-NEXT: nop
669-
; AIX64-PWR8-NEXT: addi r1, r1, 112
670-
; AIX64-PWR8-NEXT: ld r0, 16(r1)
671-
; AIX64-PWR8-NEXT: mtlr r0
612+
; AIX64-PWR8-NEXT: lis r6, 32
613+
; AIX64-PWR8-NEXT: mr r9, r4
614+
; AIX64-PWR8-NEXT: mr r8, r3
615+
; AIX64-PWR8-NEXT: add r3, r5, r6
616+
; AIX64-PWR8-NEXT: stq r8, 0(r3)
672617
; AIX64-PWR8-NEXT: blr
673618
;
674619
; PPC-PWR8-LABEL: stq_big_offset_unordered:
@@ -734,19 +679,9 @@ define dso_local void @stq_monotonic(i128 %val, ptr %dst) {
734679
;
735680
; AIX64-PWR8-LABEL: stq_monotonic:
736681
; AIX64-PWR8: # %bb.0: # %entry
737-
; AIX64-PWR8-NEXT: mflr r0
738-
; AIX64-PWR8-NEXT: stdu r1, -112(r1)
739-
; AIX64-PWR8-NEXT: mr r6, r4
740-
; AIX64-PWR8-NEXT: mr r4, r3
741-
; AIX64-PWR8-NEXT: mr r3, r5
742-
; AIX64-PWR8-NEXT: std r0, 128(r1)
743-
; AIX64-PWR8-NEXT: mr r5, r6
744-
; AIX64-PWR8-NEXT: li r6, 0
745-
; AIX64-PWR8-NEXT: bl .__atomic_store_16[PR]
746-
; AIX64-PWR8-NEXT: nop
747-
; AIX64-PWR8-NEXT: addi r1, r1, 112
748-
; AIX64-PWR8-NEXT: ld r0, 16(r1)
749-
; AIX64-PWR8-NEXT: mtlr r0
682+
; AIX64-PWR8-NEXT: mr r7, r4
683+
; AIX64-PWR8-NEXT: mr r6, r3
684+
; AIX64-PWR8-NEXT: stq r6, 0(r5)
750685
; AIX64-PWR8-NEXT: blr
751686
;
752687
; PPC-PWR8-LABEL: stq_monotonic:
@@ -812,19 +747,10 @@ define dso_local void @stq_release(i128 %val, ptr %dst) {
812747
;
813748
; AIX64-PWR8-LABEL: stq_release:
814749
; AIX64-PWR8: # %bb.0: # %entry
815-
; AIX64-PWR8-NEXT: mflr r0
816-
; AIX64-PWR8-NEXT: stdu r1, -112(r1)
817-
; AIX64-PWR8-NEXT: mr r6, r4
818-
; AIX64-PWR8-NEXT: mr r4, r3
819-
; AIX64-PWR8-NEXT: mr r3, r5
820-
; AIX64-PWR8-NEXT: std r0, 128(r1)
821-
; AIX64-PWR8-NEXT: mr r5, r6
822-
; AIX64-PWR8-NEXT: li r6, 3
823-
; AIX64-PWR8-NEXT: bl .__atomic_store_16[PR]
824-
; AIX64-PWR8-NEXT: nop
825-
; AIX64-PWR8-NEXT: addi r1, r1, 112
826-
; AIX64-PWR8-NEXT: ld r0, 16(r1)
827-
; AIX64-PWR8-NEXT: mtlr r0
750+
; AIX64-PWR8-NEXT: lwsync
751+
; AIX64-PWR8-NEXT: mr r7, r4
752+
; AIX64-PWR8-NEXT: mr r6, r3
753+
; AIX64-PWR8-NEXT: stq r6, 0(r5)
828754
; AIX64-PWR8-NEXT: blr
829755
;
830756
; PPC-PWR8-LABEL: stq_release:
@@ -890,19 +816,10 @@ define dso_local void @stq_seqcst(i128 %val, ptr %dst) {
890816
;
891817
; AIX64-PWR8-LABEL: stq_seqcst:
892818
; AIX64-PWR8: # %bb.0: # %entry
893-
; AIX64-PWR8-NEXT: mflr r0
894-
; AIX64-PWR8-NEXT: stdu r1, -112(r1)
895-
; AIX64-PWR8-NEXT: mr r6, r4
896-
; AIX64-PWR8-NEXT: mr r4, r3
897-
; AIX64-PWR8-NEXT: mr r3, r5
898-
; AIX64-PWR8-NEXT: std r0, 128(r1)
899-
; AIX64-PWR8-NEXT: mr r5, r6
900-
; AIX64-PWR8-NEXT: li r6, 5
901-
; AIX64-PWR8-NEXT: bl .__atomic_store_16[PR]
902-
; AIX64-PWR8-NEXT: nop
903-
; AIX64-PWR8-NEXT: addi r1, r1, 112
904-
; AIX64-PWR8-NEXT: ld r0, 16(r1)
905-
; AIX64-PWR8-NEXT: mtlr r0
819+
; AIX64-PWR8-NEXT: sync
820+
; AIX64-PWR8-NEXT: mr r7, r4
821+
; AIX64-PWR8-NEXT: mr r6, r3
822+
; AIX64-PWR8-NEXT: stq r6, 0(r5)
906823
; AIX64-PWR8-NEXT: blr
907824
;
908825
; PPC-PWR8-LABEL: stq_seqcst:

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