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mattarde
committed
add x87 specific runs
1 parent db0e1cb commit f35b674

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4 files changed

+84
-42
lines changed

4 files changed

+84
-42
lines changed

llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp

Lines changed: 40 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -468,7 +468,7 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
468468

469469
getActionDefinitionsBuilder(G_FABS)
470470
.legalFor(UseX87 && !HasSSE2, {s32, s64, s80})
471-
.lower();
471+
.custom();
472472

473473
// fp comparison
474474
getActionDefinitionsBuilder(G_FCMP)
@@ -673,6 +673,8 @@ bool X86LegalizerInfo::legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI,
673673
return legalizeSITOFP(MI, MRI, Helper);
674674
case TargetOpcode::G_FPTOSI:
675675
return legalizeFPTOSI(MI, MRI, Helper);
676+
case TargetOpcode::G_FABS:
677+
return legalizeFAbs(MI, MRI, Helper);
676678
}
677679
llvm_unreachable("expected switch to return");
678680
}
@@ -839,6 +841,43 @@ bool X86LegalizerInfo::legalizeNarrowingStore(MachineInstr &MI,
839841
return true;
840842
}
841843

844+
bool X86LegalizerInfo::legalizeFAbs(MachineInstr &MI,
845+
MachineRegisterInfo &MRI,
846+
LegalizerHelper &Helper) const {
847+
848+
MachineIRBuilder &MIRBuilder = Helper.MIRBuilder;
849+
Register SrcReg = MI.getOperand(1).getReg();
850+
Register DstReg = MI.getOperand(0).getReg();
851+
LLT Ty = MRI.getType(DstReg);
852+
if (Subtarget.is32Bit()) {
853+
// Reset sign bit
854+
MIRBuilder.buildAnd(
855+
DstReg, SrcReg,
856+
MIRBuilder.buildConstant(
857+
Ty, APInt::getSignedMaxValue(Ty.getScalarSizeInBits())));
858+
} else {
859+
// In 64 bit mode, constant pool is used.
860+
auto &MF = MIRBuilder.getMF();
861+
Type *IRTy = getTypeForLLT(Ty, MF.getFunction().getContext());
862+
Constant *ConstMask = ConstantInt::get(
863+
IRTy, APInt::getSignedMaxValue(Ty.getScalarSizeInBits()));
864+
LLT DstTy = MRI.getType(DstReg);
865+
const DataLayout &DL = MIRBuilder.getDataLayout();
866+
unsigned AddrSpace = DL.getDefaultGlobalsAddressSpace();
867+
Align Alignment(DL.getABITypeAlign(
868+
getTypeForLLT(DstTy, MF.getFunction().getContext())));
869+
auto Addr = MIRBuilder.buildConstantPool(
870+
LLT::pointer(AddrSpace, DL.getPointerSizeInBits(AddrSpace)),
871+
MF.getConstantPool()->getConstantPoolIndex(ConstMask, Alignment));
872+
MachineMemOperand *MMO =
873+
MF.getMachineMemOperand(MachinePointerInfo::getConstantPool(MF),
874+
MachineMemOperand::MOLoad, DstTy, Alignment);
875+
auto LoadedMask = MIRBuilder.buildLoad(DstTy, Addr, *MMO);
876+
MIRBuilder.buildAnd(DstReg, SrcReg, LoadedMask);
877+
}
878+
MI.eraseFromParent();
879+
return true;
880+
}
842881
bool X86LegalizerInfo::legalizeIntrinsic(LegalizerHelper &Helper,
843882
MachineInstr &MI) const {
844883
return true;

llvm/lib/Target/X86/GISel/X86LegalizerInfo.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -54,6 +54,8 @@ class X86LegalizerInfo : public LegalizerInfo {
5454

5555
bool legalizeFPTOSI(MachineInstr &MI, MachineRegisterInfo &MRI,
5656
LegalizerHelper &Helper) const;
57+
bool legalizeFAbs(MachineInstr &MI, MachineRegisterInfo &MRI,
58+
LegalizerHelper &Helper) const;
5759
};
5860
} // namespace llvm
5961
#endif
Lines changed: 11 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -1,23 +1,17 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2-
; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=SDAG-X64
3-
; RUN: llc < %s -mtriple=x86_64-- -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=FASTISEL-X64
4-
; RUN: llc < %s -mtriple=x86_64-- -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
5-
; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse | FileCheck %s --check-prefixes=X86,SDAG-X86
6-
; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X86,FASTISEL-X86
7-
; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86,GISEL-X86
2+
; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse2,-sse | FileCheck %s --check-prefixes=X64
3+
; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse2,-sse -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64
4+
; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse2,-sse -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X64
5+
; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse | FileCheck %s --check-prefixes=X86
6+
; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X86
7+
; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86
88

99
define x86_fp80 @test_x86_fp80_abs(x86_fp80 %arg) {
10-
; SDAG-X64-LABEL: test_x86_fp80_abs:
11-
; SDAG-X64: # %bb.0:
12-
; SDAG-X64-NEXT: fldt {{[0-9]+}}(%rsp)
13-
; SDAG-X64-NEXT: fabs
14-
; SDAG-X64-NEXT: retq
15-
;
16-
; FASTISEL-X64-LABEL: test_x86_fp80_abs:
17-
; FASTISEL-X64: # %bb.0:
18-
; FASTISEL-X64-NEXT: fldt {{[0-9]+}}(%rsp)
19-
; FASTISEL-X64-NEXT: fabs
20-
; FASTISEL-X64-NEXT: retq
10+
; X64-LABEL: test_x86_fp80_abs:
11+
; X64: # %bb.0:
12+
; X64-NEXT: fldt {{[0-9]+}}(%rsp)
13+
; X64-NEXT: fabs
14+
; X64-NEXT: retq
2115
;
2216
; X86-LABEL: test_x86_fp80_abs:
2317
; X86: # %bb.0:
@@ -27,7 +21,3 @@ define x86_fp80 @test_x86_fp80_abs(x86_fp80 %arg) {
2721
%abs = tail call x86_fp80 @llvm.fabs.f80(x86_fp80 %arg)
2822
ret x86_fp80 %abs
2923
}
30-
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
31-
; FASTISEL-X86: {{.*}}
32-
; GISEL-X86: {{.*}}
33-
; SDAG-X86: {{.*}}

llvm/test/CodeGen/X86/isel-fabs.ll

Lines changed: 31 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,8 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2-
; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=SDAG-X64
3-
; RUN: llc < %s -mtriple=x86_64-- -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=FASTISEL-X64
4-
; RUN: llc < %s -mtriple=x86_64-- -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
5-
; RUN: llc < %s -mtriple=i686-- -mattr=-x87 | FileCheck %s --check-prefixes=SDAG-X86
2+
; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87 | FileCheck %s --check-prefixes=X64
3+
; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64,FASTISEL-X64
4+
; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
5+
; RUN: llc < %s -mtriple=i686-- -mattr=-x87 | FileCheck %s --check-prefixes=X86
66
; RUN: llc < %s -mtriple=i686-- -mattr=-x87 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=FASTISEL-X86
77
; RUN: llc < %s -mtriple=i686-- -mattr=-x87 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
88

@@ -17,19 +17,23 @@ define float @test_float_abs(float %arg) {
1717
; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
1818
; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
1919
; X86-NEXT: retl
20+
; X64-LABEL: test_float_abs:
21+
; X64: # %bb.0:
22+
; X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
23+
; X64-NEXT: retq
2024
;
2125
; GISEL-X64-LABEL: test_float_abs:
2226
; GISEL-X64: # %bb.0:
2327
; GISEL-X64-NEXT: movd %xmm0, %eax
24-
; GISEL-X64-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
28+
; GISEL-X64-NEXT: andl {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %eax
2529
; GISEL-X64-NEXT: movd %eax, %xmm0
2630
; GISEL-X64-NEXT: retq
2731
;
28-
; SDAG-X86-LABEL: test_float_abs:
29-
; SDAG-X86: # %bb.0:
30-
; SDAG-X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
31-
; SDAG-X86-NEXT: andl {{[0-9]+}}(%esp), %eax
32-
; SDAG-X86-NEXT: retl
32+
; X86-LABEL: test_float_abs:
33+
; X86: # %bb.0:
34+
; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
35+
; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
36+
; X86-NEXT: retl
3337
;
3438
; FASTISEL-X86-LABEL: test_float_abs:
3539
; FASTISEL-X86: # %bb.0:
@@ -58,21 +62,24 @@ define double @test_double_abs(double %arg) {
5862
; X86-NEXT: movl $2147483647, %edx # imm = 0x7FFFFFFF
5963
; X86-NEXT: andl {{[0-9]+}}(%esp), %edx
6064
; X86-NEXT: retl
65+
; X64-LABEL: test_double_abs:
66+
; X64: # %bb.0:
67+
; X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
68+
; X64-NEXT: retq
6169
;
6270
; GISEL-X64-LABEL: test_double_abs:
6371
; GISEL-X64: # %bb.0:
64-
; GISEL-X64-NEXT: movabsq $9223372036854775807, %rax # imm = 0x7FFFFFFFFFFFFFFF
65-
; GISEL-X64-NEXT: movq %xmm0, %rcx
66-
; GISEL-X64-NEXT: andq %rax, %rcx
67-
; GISEL-X64-NEXT: movq %rcx, %xmm0
72+
; GISEL-X64-NEXT: movq %xmm0, %rax
73+
; GISEL-X64-NEXT: andq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax
74+
; GISEL-X64-NEXT: movq %rax, %xmm0
6875
; GISEL-X64-NEXT: retq
6976
;
70-
; SDAG-X86-LABEL: test_double_abs:
71-
; SDAG-X86: # %bb.0:
72-
; SDAG-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
73-
; SDAG-X86-NEXT: movl $2147483647, %edx # imm = 0x7FFFFFFF
74-
; SDAG-X86-NEXT: andl {{[0-9]+}}(%esp), %edx
75-
; SDAG-X86-NEXT: retl
77+
; X86-LABEL: test_double_abs:
78+
; X86: # %bb.0:
79+
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
80+
; X86-NEXT: movl $2147483647, %edx # imm = 0x7FFFFFFF
81+
; X86-NEXT: andl {{[0-9]+}}(%esp), %edx
82+
; X86-NEXT: retl
7683
;
7784
; FASTISEL-X86-LABEL: test_double_abs:
7885
; FASTISEL-X86: # %bb.0:
@@ -88,6 +95,10 @@ define double @test_double_abs(double %arg) {
8895
; GISEL-X86-NEXT: andl {{[0-9]+}}(%esp), %eax
8996
; GISEL-X86-NEXT: andl {{[0-9]+}}(%esp), %edx
9097
; GISEL-X86-NEXT: retl
98+
9199
%abs = tail call double @llvm.fabs.f64(double %arg)
92100
ret double %abs
93101
}
102+
103+
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
104+
; FASTISEL-X64: {{.*}}

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