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irtranslate scalable vector store
1 parent 5a0382c commit f422c45

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3 files changed

+491
-2
lines changed

3 files changed

+491
-2
lines changed

llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1413,7 +1413,7 @@ bool IRTranslator::translateLoad(const User &U, MachineIRBuilder &MIRBuilder) {
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bool IRTranslator::translateStore(const User &U, MachineIRBuilder &MIRBuilder) {
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const StoreInst &SI = cast<StoreInst>(U);
1416-
if (DL->getTypeStoreSize(SI.getValueOperand()->getType()) == 0)
1416+
if (DL->getTypeStoreSize(SI.getValueOperand()->getType()).isZero())
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return true;
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ArrayRef<Register> Vals = getOrCreateVRegs(*SI.getValueOperand());

llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -21005,7 +21005,8 @@ bool RISCVTargetLowering::fallBackToDAGISel(const Instruction &Inst) const {
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if (Op == Instruction::Add || Op == Instruction::Sub ||
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Op == Instruction::And || Op == Instruction::Or ||
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Op == Instruction::Xor || Op == Instruction::InsertElement ||
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Op == Instruction::ShuffleVector || Op == Instruction::Load)
21008+
Op == Instruction::ShuffleVector || Op == Instruction::Load ||
21009+
Op == Instruction::Store)
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return false;
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if (Inst.getType()->isScalableTy())

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