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[MLIR] Cleanup Pass Pipeline in sm_90 Integration Tests (#67416)
MLIR has begun supporting many features of Nvidia's sm_90 architecture, and new tests have been added for it. Although the tests worked well, there were redundancies in the pipeline. This PR cleans up unnecessary passes.
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3 files changed

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‎mlir/test/Integration/GPU/CUDA/sm90/tma_load_128x64_swizzle128b.mlir

Lines changed: 13 additions & 17 deletions
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// RUN: mlir-opt %s --convert-nvgpu-to-nvvm \
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// RUN: -convert-linalg-to-loops \
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// RUN: -gpu-kernel-outlining \
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// RUN: -convert-vector-to-scf \
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// RUN: -lower-affine \
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// RUN: -convert-scf-to-cf \
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// RUN: -convert-nvvm-to-llvm \
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// RUN: -convert-nvgpu-to-nvvm \
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// RUN: -convert-scf-to-cf \
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// RUN: -convert-vector-to-llvm \
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// RUN: -convert-math-to-llvm \
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// RUN: -convert-index-to-llvm=index-bitwidth=32 \
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// RUN: -convert-arith-to-llvm \
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// RUN: -finalize-memref-to-llvm='use-opaque-pointers=1' \
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// RUN: -convert-func-to-llvm \
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// RUN: -canonicalize -cse \
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// RUN: -expand-strided-metadata --nvvm-attach-target="module=main_kernel features=+ptx80 chip=sm_90 O=3" \
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// RUN: mlir-opt %s \
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// RUN: -convert-nvgpu-to-nvvm \
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// RUN: -gpu-kernel-outlining \
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// RUN: -convert-vector-to-scf \
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// RUN: -convert-scf-to-cf \
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// RUN: -convert-nvvm-to-llvm \
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// RUN: -convert-vector-to-llvm \
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// RUN: -convert-index-to-llvm=index-bitwidth=32 \
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// RUN: -convert-arith-to-llvm \
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// RUN: -finalize-memref-to-llvm='use-opaque-pointers=1' \
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// RUN: -convert-func-to-llvm \
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// RUN: -canonicalize -cse \
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// RUN: -expand-strided-metadata --nvvm-attach-target="module=main_kernel features=+ptx80 chip=sm_90 O=3" \
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// RUN: | mlir-opt -pass-pipeline='builtin.module(gpu.module(strip-debuginfo,convert-gpu-to-nvvm,convert-index-to-llvm{index-bitwidth=32},canonicalize,cse))' \
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// RUN: | mlir-opt --gpu-to-llvm --gpu-module-to-binary=format=%gpu_compilation_format -canonicalize -cse -reconcile-unrealized-casts \
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// RUN: | mlir-cpu-runner \

‎mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x64_swizzle128b.mlir

Lines changed: 14 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -1,30 +1,17 @@
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// RUN: mlir-opt %s --convert-nvgpu-to-nvvm \
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// RUN: -convert-linalg-to-loops \
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// RUN: -canonicalize -cse \
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// RUN: -gpu-kernel-outlining \
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// RUN: -canonicalize -cse \
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// RUN: -convert-vector-to-scf \
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// RUN: -canonicalize -cse \
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// RUN: -lower-affine \
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// RUN: -canonicalize -cse \
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// RUN: -convert-scf-to-cf \
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// RUN: -canonicalize -cse \
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// RUN: -convert-nvvm-to-llvm \
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// RUN: -canonicalize -cse \
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// RUN: -convert-nvgpu-to-nvvm \
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// RUN: -canonicalize -cse \
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// RUN: -convert-scf-to-cf \
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// RUN: -convert-vector-to-llvm \
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// RUN: -canonicalize -cse \
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// RUN: -convert-math-to-llvm \
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// RUN: -canonicalize -cse \
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// RUN: -lower-affine \
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// RUN: -convert-index-to-llvm=index-bitwidth=32 \
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// RUN: -convert-arith-to-llvm \
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// RUN: -finalize-memref-to-llvm='use-opaque-pointers=1' \
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// RUN: -convert-func-to-llvm \
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// RUN: -canonicalize -cse \
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// RUN: -expand-strided-metadata --nvvm-attach-target="module=main_kernel features=+ptx80 chip=sm_90 O=3" \
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// RUN: mlir-opt %s \
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// RUN: -convert-nvgpu-to-nvvm \
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// RUN: -canonicalize -cse \
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// RUN: -gpu-kernel-outlining \
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// RUN: -convert-vector-to-scf \
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// RUN: -convert-scf-to-cf \
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// RUN: -convert-nvvm-to-llvm \
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// RUN: -convert-vector-to-llvm \
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// RUN: -convert-index-to-llvm=index-bitwidth=32 \
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// RUN: -convert-arith-to-llvm \
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// RUN: -finalize-memref-to-llvm='use-opaque-pointers=1' \
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// RUN: -convert-func-to-llvm \
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// RUN: -canonicalize -cse \
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// RUN: -expand-strided-metadata --nvvm-attach-target="module=main_kernel features=+ptx80 chip=sm_90 O=3" \
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// RUN: | mlir-opt -pass-pipeline='builtin.module(gpu.module(strip-debuginfo,convert-gpu-to-nvvm,convert-index-to-llvm{index-bitwidth=32},canonicalize,cse))' \
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// RUN: | mlir-opt --gpu-to-llvm --gpu-module-to-binary -canonicalize -cse -reconcile-unrealized-casts \
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// RUN: | mlir-cpu-runner \

‎mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x8_8x128_noswizzle.mlir

Lines changed: 0 additions & 3 deletions
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@@ -1,7 +1,6 @@
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// RUN: mlir-opt %s --convert-nvgpu-to-nvvm \
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// RUN: -gpu-kernel-outlining \
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// RUN: -convert-nvvm-to-llvm \
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// RUN: -convert-nvgpu-to-nvvm \
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// RUN: -convert-scf-to-cf \
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// RUN: -convert-vector-to-llvm \
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// RUN: -convert-index-to-llvm=index-bitwidth=32 \
@@ -25,7 +24,6 @@
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// RUN: mlir-opt %s --convert-nvgpu-to-nvvm \
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// RUN: -gpu-kernel-outlining \
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// RUN: -convert-nvvm-to-llvm \
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// RUN: -convert-nvgpu-to-nvvm \
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// RUN: -convert-scf-to-cf \
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// RUN: -convert-vector-to-llvm \
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// RUN: -convert-index-to-llvm=index-bitwidth=32 \
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// RUN: --entry-point-result=void \
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// RUN: | FileCheck %s
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// CHECK: [GPU] TMA BEFORE lhs[45][7] 0.000000
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// CHECK: [GPU] TMA BEFORE rhs[7][0] 0.000000
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// CHECK: [GPU] TMA LOADED lhs[45][7] 7.000000

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