Skip to content

Commit f5917e0

Browse files
committed
[TableGen] Allow isAllocatable inheritence from any superclass
When setting Allocatable on a generated register class check all superclasses and set Allocatable true if any superclass is allocatable. Without this change generated register classes based on an allocatable class may end up unallocatable due to the topological inheritance order. This change primarily effects AMDGPU backend; however, there are a few changes in MIPs GlobalISel register constraints as a result. Reviewed By: kparzysz Differential Revision: https://reviews.llvm.org/D105967
1 parent d695d0d commit f5917e0

File tree

1 file changed

+4
-1
lines changed

1 file changed

+4
-1
lines changed

llvm/utils/TableGen/CodeGenRegisters.cpp

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -833,7 +833,10 @@ void CodeGenRegisterClass::inheritProperties(CodeGenRegBank &RegBank) {
833833
Namespace = Super.Namespace;
834834
VTs = Super.VTs;
835835
CopyCost = Super.CopyCost;
836-
Allocatable = Super.Allocatable;
836+
// Check for allocatable superclasses.
837+
Allocatable = any_of(SuperClasses, [&](const CodeGenRegisterClass *S) {
838+
return S->Allocatable;
839+
});
837840
AltOrderSelect = Super.AltOrderSelect;
838841
AllocationPriority = Super.AllocationPriority;
839842
GeneratePressureSet |= Super.GeneratePressureSet;

0 commit comments

Comments
 (0)