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urnathanurnathan
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Always barrier
1 parent 4ec4b80 commit f59f023

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2 files changed

+40
-36
lines changed

2 files changed

+40
-36
lines changed

‎clang/lib/CodeGen/CGRecordLayoutBuilder.cpp

Lines changed: 11 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -498,7 +498,7 @@ CGRecordLowering::accumulateBitFields(RecordDecl::field_iterator Field,
498498
// again at the bitfield following that best one.
499499

500500
// The accumulation is also prevented when:
501-
// *) it would cross a zero-width bitfield (ABI-dependent), or
501+
// *) it would cross a character-aigned zero-width bitfield, or
502502
// *) fine-grained bitfield access option is in effect.
503503

504504
CharUnits RegSize =
@@ -542,16 +542,20 @@ CGRecordLowering::accumulateBitFields(RecordDecl::field_iterator Field,
542542
BeginOffset = bitsToCharUnits(BitOffset);
543543
BitSizeSinceBegin = 0;
544544
} else if ((BitOffset % CharBits) != 0) {
545-
// Bitfield occupies the same char as previous, it must be part of the
546-
// same span.
545+
// Bitfield occupies the same character as previous bitfield, it must be
546+
// part of the same span. This can include zero-length bitfields, should
547+
// the target not align them to character boundaries. Such non-alignment
548+
// is at variance with the C++ std that requires zero-length bitfields
549+
// be a barrier between access units. But of course we can't achieve
550+
// that in the middle of a character.
547551
assert(BitOffset == Context.toBits(BeginOffset) + BitSizeSinceBegin &&
548552
"Concatenating non-contiguous bitfields");
549553
} else {
550-
// Bitfield could begin a new span.
554+
// Bitfield potentially begins a new span. This includes zero-length
555+
// bitfields on non-aligning targets that lie at character boundaries
556+
// (those are barriers to merging).
551557
LimitOffset = bitsToCharUnits(BitOffset);
552-
if (Field->isZeroLengthBitField(Context) &&
553-
(Context.getTargetInfo().useZeroLengthBitfieldAlignment() ||
554-
Context.getTargetInfo().useBitFieldTypeAlignment()))
558+
if (Field->isZeroLengthBitField(Context))
555559
Barrier = true;
556560
AtAlignedBoundary = true;
557561
}

‎clang/test/CodeGen/bitfield-access-pad.c

Lines changed: 29 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -46,15 +46,15 @@ struct P1 {
4646
// CHECK-LABEL: LLVMType:%struct.P1 =
4747
// LAYOUT-T-SAME: type { i8, i8, [2 x i8] }
4848
// LAYOUT-ARM64-T-SAME: type { i8, i8 }
49-
// LAYOUT-NT-SAME: type { i16 }
49+
// LAYOUT-NT-SAME: type { i8, i8 }
5050
// LAYOUT-STRICT-NT-SAME: type { i8, i8 }
5151
// LAYOUT-DWN32-SAME: type { i8, [3 x i8], i8, [3 x i8] }
5252
// CHECK: BitFields:[
5353
// LAYOUT-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
5454
// LAYOUT-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:1
5555

56-
// LAYOUT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:16 StorageOffset:0
57-
// LAYOUT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:16 StorageOffset:0
56+
// LAYOUT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
57+
// LAYOUT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:1
5858

5959
// LAYOUT-STRICT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
6060
// LAYOUT-STRICT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:1
@@ -76,15 +76,15 @@ struct P2 {
7676
// CHECK-LABEL: LLVMType:%struct.P2 =
7777
// LAYOUT-T-SAME: type { i8, i8, i8, i8 }
7878
// LAYOUT-ARM64-T-SAME: type { i8, i8, i8, i8 }
79-
// LAYOUT-NT-SAME: type { i16 }
79+
// LAYOUT-NT-SAME: type { i8, i8 }
8080
// LAYOUT-STRICT-NT-SAME: type { i8, i8 }
8181
// LAYOUT-DWN32-SAME: type { i8, [3 x i8], i8, [3 x i8] }
8282
// CHECK: BitFields:[
8383
// LAYOUT-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
8484
// LAYOUT-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:2
8585

86-
// LAYOUT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:16 StorageOffset:0
87-
// LAYOUT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:16 StorageOffset:0
86+
// LAYOUT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
87+
// LAYOUT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:1
8888

8989
// LAYOUT-STRICT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
9090
// LAYOUT-STRICT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:1
@@ -106,15 +106,15 @@ struct P3 {
106106
// CHECK-LABEL: LLVMType:%struct.P3 =
107107
// LAYOUT-T-SAME: type { i8, [3 x i8], i8, [3 x i8] }
108108
// LAYOUT-ARM64-T-SAME: type { i8, [3 x i8], i8, [3 x i8] }
109-
// LAYOUT-NT-SAME: type { i16 }
109+
// LAYOUT-NT-SAME: type { i8, i8 }
110110
// LAYOUT-STRICT-NT-SAME: type { i8, i8 }
111111
// LAYOUT-DWN32-SAME: type { i8, [3 x i8], i8, [3 x i8] }
112112
// CHECK: BitFields:[
113113
// LAYOUT-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
114114
// LAYOUT-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:4
115115

116-
// LAYOUT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:16 StorageOffset:0
117-
// LAYOUT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:16 StorageOffset:0
116+
// LAYOUT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
117+
// LAYOUT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:1
118118

119119
// LAYOUT-STRICT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
120120
// LAYOUT-STRICT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:1
@@ -135,15 +135,15 @@ struct P4 {
135135
// CHECK-LABEL: LLVMType:%struct.P4 =
136136
// LAYOUT-T-SAME: type { i8, [3 x i8], i8, [3 x i8] }
137137
// LAYOUT-ARM64-T-SAME: type { i8, [3 x i8], i8, [3 x i8] }
138-
// LAYOUT-NT-SAME: type { i16 }
138+
// LAYOUT-NT-SAME: type { i8, i8 }
139139
// LAYOUT-STRICT-NT-SAME: type { i8, i8 }
140140
// LAYOUT-DWN32-SAME: type { i8, [3 x i8], i8, [3 x i8] }
141141
// CHECK: BitFields:[
142142
// LAYOUT-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
143143
// LAYOUT-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:4
144144

145-
// LAYOUT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:16 StorageOffset:0
146-
// LAYOUT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:16 StorageOffset:0
145+
// LAYOUT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
146+
// LAYOUT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:1
147147

148148
// LAYOUT-STRICT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
149149
// LAYOUT-STRICT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:1
@@ -163,15 +163,15 @@ struct P5 {
163163
// CHECK-LABEL: LLVMType:%struct.P5 =
164164
// LAYOUT-T-SAME: type { i8, [3 x i8], i8, [3 x i8] }
165165
// LAYOUT-ARM64-T-SAME: type { i8, [3 x i8], i8, [3 x i8] }
166-
// LAYOUT-NT-SAME: type { i16 }
166+
// LAYOUT-NT-SAME: type { i8, i8 }
167167
// LAYOUT-STRICT-NT-SAME: type { i8, i8 }
168168
// LAYOUT-DWN32-SAME: type { i8, [3 x i8], i8, [3 x i8] }
169169
// CHECK: BitFields:[
170170
// LAYOUT-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
171171
// LAYOUT-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:4
172172

173-
// LAYOUT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:16 StorageOffset:0
174-
// LAYOUT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:16 StorageOffset:0
173+
// LAYOUT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
174+
// LAYOUT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:1
175175

176176
// LAYOUT-STRICT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
177177
// LAYOUT-STRICT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:1
@@ -193,15 +193,15 @@ struct P6 {
193193
// CHECK-LABEL: LLVMType:%struct.P6 =
194194
// LAYOUT-T-SAME: type { i8, [3 x i8], i8, [3 x i8] }
195195
// LAYOUT-ARM64-T-SAME: type { i8, [3 x i8], i8, [3 x i8] }
196-
// LAYOUT-NT-SAME: type { i16 }
196+
// LAYOUT-NT-SAME: type { i8, i8 }
197197
// LAYOUT-STRICT-NT-SAME: type { i8, i8 }
198198
// LAYOUT-DWN32-SAME: type { i8, [3 x i8], i8, [3 x i8] }
199199
// CHECK: BitFields:[
200200
// LAYOUT-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
201201
// LAYOUT-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:4
202202

203-
// LAYOUT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:16 StorageOffset:0
204-
// LAYOUT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:16 StorageOffset:0
203+
// LAYOUT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
204+
// LAYOUT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:1
205205

206206
// LAYOUT-STRICT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
207207
// LAYOUT-STRICT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:1
@@ -221,15 +221,15 @@ struct P7 {
221221
// CHECK-LABEL: LLVMType:%struct.P7 =
222222
// LAYOUT-T-SAME: type { i8, i8, i8, i8 }
223223
// LAYOUT-ARM64-T-SAME: type { i8, i8, i8, i8 }
224-
// LAYOUT-NT-SAME: type { i16 }
224+
// LAYOUT-NT-SAME: type { i8, i8 }
225225
// LAYOUT-STRICT-NT-SAME: type { i8, i8 }
226226
// LAYOUT-DWN32-SAME: type { i8, [3 x i8], i8, [3 x i8] }
227227
// CHECK: BitFields:[
228228
// LAYOUT-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
229229
// LAYOUT-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:2
230230

231-
// LAYOUT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:16 StorageOffset:0
232-
// LAYOUT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:16 StorageOffset:0
231+
// LAYOUT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
232+
// LAYOUT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:1
233233

234234
// LAYOUT-STRICT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
235235
// LAYOUT-STRICT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:1
@@ -251,18 +251,18 @@ struct __attribute__ ((aligned (2))) P7_align {
251251
// CHECK-LABEL: LLVMType:%struct.P7_align =
252252
// LAYOUT-T-SAME: type { i8, i8, i8, i8 }
253253
// LAYOUT-ARM64-T-SAME: type { i8, i8, i8, i8 }
254-
// LAYOUT-NT-SAME: type { i16 }
255-
// LAYOUT-STRICT-NT-SAME: type { i16 }
254+
// LAYOUT-NT-SAME: type { i8, i8 }
255+
// LAYOUT-STRICT-NT-SAME: type { i8, i8 }
256256
// LAYOUT-DWN32-SAME: type { i8, [3 x i8], i8, [3 x i8] }
257257
// CHECK: BitFields:[
258258
// LAYOUT-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
259259
// LAYOUT-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:2
260260

261-
// LAYOUT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:16 StorageOffset:0
262-
// LAYOUT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:16 StorageOffset:0
261+
// LAYOUT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
262+
// LAYOUT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:1
263263

264-
// LAYOUT-STRICT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:16 StorageOffset:0
265-
// LAYOUT-STRICT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:16 StorageOffset:0
264+
// LAYOUT-STRICT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
265+
// LAYOUT-STRICT-NT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:1
266266

267267
// LAYOUT-ARM64-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
268268
// LAYOUT-ARM64-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:2
@@ -370,8 +370,8 @@ struct __attribute__((aligned(4))) P11 {
370370
// CHECK-LABEL: LLVMType:%struct.P11 =
371371
// LAYOUT-T-SAME: type { i24 }
372372
// LAYOUT-ARM64-T-SAME: type { i24 }
373-
// LAYOUT-NT-SAME: type { i32 }
374-
// LAYOUT-STRICT-NT-SAME: type { i32 }
373+
// LAYOUT-NT-SAME: type { i24 }
374+
// LAYOUT-STRICT-NT-SAME: type { i24 }
375375
// LAYOUT-DWN32-SAME: type { i32 }
376376
// CHECK: BitFields:[
377377
// LAYOUT-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:7 IsSigned:0 StorageSize:32 StorageOffset:0

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