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[SLPVectorizer] Move X86 specific handling into X86TTIImpl. (#137830)
`ad9909d "[SLP]Fix perfect diamond match with extractelements in scalars" ` changed SLPVectorizer getScalarizationOverhead() to call TTI.getVectorInstrCost() instead of TTI.getScalarizationOverhead() in some cases. This was due to X86 specific handlings in these (overridden) methods, and unfortunately the general preference of TTI.getScalarizationOverhead() was dropped. If VL is available it should always be preferred to use getScalarizationOverhead(), and this is indeed the case for SystemZ which has a special insertion instruction that can insert two GPR64s. Then ` 33af951 "[SLP]Synchronize cost of gather/buildvector nodes with codegen"` reworked SLPVectorizer getGatherCost() which together with ad9909d caused the SystemZ test vec-elt-insertion.ll to fail. This patch restores the SystemZ test and reverts the change in SLPVectorizer getScalarizationOverhead() so that TTI.getScalarizationOverhead() is always called again. The ForPoisonSrc argument is now passed on to the TTI method so that X86 can handle this as required. Fixes: #135346
1 parent 721c5cc commit f5c8c1e

16 files changed

+75
-60
lines changed

‎llvm/include/llvm/Analysis/TargetTransformInfo.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -941,6 +941,7 @@ class TargetTransformInfo {
941941
const APInt &DemandedElts,
942942
bool Insert, bool Extract,
943943
TTI::TargetCostKind CostKind,
944+
bool ForPoisonSrc = true,
944945
ArrayRef<Value *> VL = {}) const;
945946

946947
/// Estimate the overhead of scalarizing an instructions unique

‎llvm/include/llvm/Analysis/TargetTransformInfoImpl.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -453,7 +453,8 @@ class TargetTransformInfoImplBase {
453453

454454
virtual InstructionCost getScalarizationOverhead(
455455
VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract,
456-
TTI::TargetCostKind CostKind, ArrayRef<Value *> VL = {}) const {
456+
TTI::TargetCostKind CostKind, bool ForPoisonSrc = true,
457+
ArrayRef<Value *> VL = {}) const {
457458
return 0;
458459
}
459460

‎llvm/include/llvm/CodeGen/BasicTTIImpl.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -871,7 +871,8 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
871871
/// extracted from vectors.
872872
InstructionCost getScalarizationOverhead(
873873
VectorType *InTy, const APInt &DemandedElts, bool Insert, bool Extract,
874-
TTI::TargetCostKind CostKind, ArrayRef<Value *> VL = {}) const override {
874+
TTI::TargetCostKind CostKind, bool ForPoisonSrc = true,
875+
ArrayRef<Value *> VL = {}) const override {
875876
/// FIXME: a bitfield is not a reasonable abstraction for talking about
876877
/// which elements are needed from a scalable vector
877878
if (isa<ScalableVectorType>(InTy))

‎llvm/lib/Analysis/TargetTransformInfo.cpp

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -630,9 +630,10 @@ bool TargetTransformInfo::isTargetIntrinsicWithStructReturnOverloadAtField(
630630

631631
InstructionCost TargetTransformInfo::getScalarizationOverhead(
632632
VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract,
633-
TTI::TargetCostKind CostKind, ArrayRef<Value *> VL) const {
633+
TTI::TargetCostKind CostKind, bool ForPoisonSrc,
634+
ArrayRef<Value *> VL) const {
634635
return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
635-
CostKind, VL);
636+
CostKind, ForPoisonSrc, VL);
636637
}
637638

638639
InstructionCost TargetTransformInfo::getOperandsScalarizationOverhead(

‎llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3870,7 +3870,8 @@ InstructionCost AArch64TTIImpl::getVectorInstrCost(const Instruction &I,
38703870

38713871
InstructionCost AArch64TTIImpl::getScalarizationOverhead(
38723872
VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract,
3873-
TTI::TargetCostKind CostKind, ArrayRef<Value *> VL) const {
3873+
TTI::TargetCostKind CostKind, bool ForPoisonSrc,
3874+
ArrayRef<Value *> VL) const {
38743875
if (isa<ScalableVectorType>(Ty))
38753876
return InstructionCost::getInvalid();
38763877
if (Ty->getElementType()->isFloatingPointTy())

‎llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -462,7 +462,8 @@ class AArch64TTIImpl : public BasicTTIImplBase<AArch64TTIImpl> {
462462

463463
InstructionCost getScalarizationOverhead(
464464
VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract,
465-
TTI::TargetCostKind CostKind, ArrayRef<Value *> VL = {}) const override;
465+
TTI::TargetCostKind CostKind, bool ForPoisonSrc = true,
466+
ArrayRef<Value *> VL = {}) const override;
466467

467468
/// Return the cost of the scaling factor used in the addressing
468469
/// mode represented by AM for this target, for a load/store

‎llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -112,7 +112,8 @@ class NVPTXTTIImpl : public BasicTTIImplBase<NVPTXTTIImpl> {
112112

113113
InstructionCost getScalarizationOverhead(
114114
VectorType *InTy, const APInt &DemandedElts, bool Insert, bool Extract,
115-
TTI::TargetCostKind CostKind, ArrayRef<Value *> VL = {}) const override {
115+
TTI::TargetCostKind CostKind, bool ForPoisonSrc = true,
116+
ArrayRef<Value *> VL = {}) const override {
116117
if (!InTy->getElementCount().isFixed())
117118
return InstructionCost::getInvalid();
118119

@@ -141,7 +142,8 @@ class NVPTXTTIImpl : public BasicTTIImplBase<NVPTXTTIImpl> {
141142
Insert = false;
142143
}
143144
return Cost + BaseT::getScalarizationOverhead(InTy, DemandedElts, Insert,
144-
Extract, CostKind, VL);
145+
Extract, CostKind,
146+
ForPoisonSrc, VL);
145147
}
146148

147149
void getUnrollingPreferences(Loop *L, ScalarEvolution &SE,

‎llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -860,7 +860,8 @@ static unsigned isM1OrSmaller(MVT VT) {
860860

861861
InstructionCost RISCVTTIImpl::getScalarizationOverhead(
862862
VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract,
863-
TTI::TargetCostKind CostKind, ArrayRef<Value *> VL) const {
863+
TTI::TargetCostKind CostKind, bool ForPoisonSrc,
864+
ArrayRef<Value *> VL) const {
864865
if (isa<ScalableVectorType>(Ty))
865866
return InstructionCost::getInvalid();
866867

‎llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -168,7 +168,8 @@ class RISCVTTIImpl : public BasicTTIImplBase<RISCVTTIImpl> {
168168

169169
InstructionCost getScalarizationOverhead(
170170
VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract,
171-
TTI::TargetCostKind CostKind, ArrayRef<Value *> VL = {}) const override;
171+
TTI::TargetCostKind CostKind, bool ForPoisonSrc = true,
172+
ArrayRef<Value *> VL = {}) const override;
172173

173174
InstructionCost
174175
getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,

‎llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -507,7 +507,8 @@ static bool isFreeEltLoad(Value *Op) {
507507

508508
InstructionCost SystemZTTIImpl::getScalarizationOverhead(
509509
VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract,
510-
TTI::TargetCostKind CostKind, ArrayRef<Value *> VL) const {
510+
TTI::TargetCostKind CostKind, bool ForPoisonSrc,
511+
ArrayRef<Value *> VL) const {
511512
unsigned NumElts = cast<FixedVectorType>(Ty)->getNumElements();
512513
InstructionCost Cost = 0;
513514

@@ -529,7 +530,7 @@ InstructionCost SystemZTTIImpl::getScalarizationOverhead(
529530
}
530531

531532
Cost += BaseT::getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
532-
CostKind, VL);
533+
CostKind, ForPoisonSrc, VL);
533534
return Cost;
534535
}
535536

‎llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -90,7 +90,8 @@ class SystemZTTIImpl : public BasicTTIImplBase<SystemZTTIImpl> {
9090
bool LSRWithInstrQueries() const override { return true; }
9191
InstructionCost getScalarizationOverhead(
9292
VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract,
93-
TTI::TargetCostKind CostKind, ArrayRef<Value *> VL = {}) const override;
93+
TTI::TargetCostKind CostKind, bool ForPoisonSrc = true,
94+
ArrayRef<Value *> VL = {}) const override;
9495
bool supportsEfficientVectorElementLoadStore() const override { return true; }
9596
bool enableInterleavedAccessVectorization() const override { return true; }
9697

‎llvm/lib/Target/X86/X86TargetTransformInfo.cpp

Lines changed: 20 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4916,7 +4916,8 @@ InstructionCost X86TTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val,
49164916

49174917
InstructionCost X86TTIImpl::getScalarizationOverhead(
49184918
VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract,
4919-
TTI::TargetCostKind CostKind, ArrayRef<Value *> VL) const {
4919+
TTI::TargetCostKind CostKind, bool ForPoisonSrc,
4920+
ArrayRef<Value *> VL) const {
49204921
assert(DemandedElts.getBitWidth() ==
49214922
cast<FixedVectorType>(Ty)->getNumElements() &&
49224923
"Vector size mismatch");
@@ -4935,7 +4936,24 @@ InstructionCost X86TTIImpl::getScalarizationOverhead(
49354936
assert(NumLegalVectors >= 0 && "Negative cost!");
49364937

49374938
// For insertions, a ISD::BUILD_VECTOR style vector initialization can be much
4938-
// cheaper than an accumulation of ISD::INSERT_VECTOR_ELT.
4939+
// cheaper than an accumulation of ISD::INSERT_VECTOR_ELT. SLPVectorizer has
4940+
// a special heuristic regarding poison input which is passed here in
4941+
// ForPoisonSrc.
4942+
if (Insert && !ForPoisonSrc) {
4943+
// This is nearly identical to BaseT::getScalarizationOverhead(), except
4944+
// it is passing nullptr to getVectorInstrCost() for Op0 (instead of
4945+
// Constant::getNullValue()), which makes the X86TTIImpl
4946+
// getVectorInstrCost() return 0 instead of 1.
4947+
for (unsigned I : seq(DemandedElts.getBitWidth())) {
4948+
if (!DemandedElts[I])
4949+
continue;
4950+
Cost += getVectorInstrCost(Instruction::InsertElement, Ty, CostKind, I,
4951+
Constant::getNullValue(Ty),
4952+
VL.empty() ? nullptr : VL[I]);
4953+
}
4954+
return Cost;
4955+
}
4956+
49394957
if (Insert) {
49404958
if ((MScalarTy == MVT::i16 && ST->hasSSE2()) ||
49414959
(MScalarTy.isInteger() && ST->hasSSE41()) ||

‎llvm/lib/Target/X86/X86TargetTransformInfo.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -170,7 +170,8 @@ class X86TTIImpl : public BasicTTIImplBase<X86TTIImpl> {
170170
Value *Op1) const override;
171171
InstructionCost getScalarizationOverhead(
172172
VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract,
173-
TTI::TargetCostKind CostKind, ArrayRef<Value *> VL = {}) const override;
173+
TTI::TargetCostKind CostKind, bool ForPoisonSrc = true,
174+
ArrayRef<Value *> VL = {}) const override;
174175
InstructionCost
175176
getReplicationShuffleCost(Type *EltTy, int ReplicationFactor, int VF,
176177
const APInt &DemandedDstElts,

‎llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

Lines changed: 2 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -5738,26 +5738,8 @@ getScalarizationOverhead(const TargetTransformInfo &TTI, Type *ScalarTy,
57385738
}
57395739
return Cost;
57405740
}
5741-
APInt NewDemandedElts = DemandedElts;
5742-
InstructionCost Cost = 0;
5743-
if (!ForPoisonSrc && Insert) {
5744-
// Handle insert into non-poison vector.
5745-
// TODO: Need to teach getScalarizationOverhead about insert elements into
5746-
// non-poison input vector to better handle such cases. Currently, it is
5747-
// very conservative and may "pessimize" the vectorization.
5748-
for (unsigned I : seq(DemandedElts.getBitWidth())) {
5749-
if (!DemandedElts[I])
5750-
continue;
5751-
Cost += TTI.getVectorInstrCost(Instruction::InsertElement, Ty, CostKind,
5752-
I, Constant::getNullValue(Ty),
5753-
VL.empty() ? nullptr : VL[I]);
5754-
}
5755-
NewDemandedElts.clearAllBits();
5756-
} else if (!NewDemandedElts.isZero()) {
5757-
Cost += TTI.getScalarizationOverhead(Ty, NewDemandedElts, Insert, Extract,
5758-
CostKind, VL);
5759-
}
5760-
return Cost;
5741+
return TTI.getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
5742+
CostKind, ForPoisonSrc, VL);
57615743
}
57625744

57635745
/// This is similar to TargetTransformInfo::getVectorInstrCost, but if ScalarTy

‎llvm/test/Transforms/SLPVectorizer/SystemZ/vec-elt-insertion.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -114,13 +114,13 @@ define void @fun2(ptr %0, ptr %Dst) {
114114
; CHECK: [[BB4]]:
115115
; CHECK-NEXT: ret void
116116
; CHECK: [[BB5]]:
117+
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[DST]], i64 24
118+
; CHECK-NEXT: store i64 [[TMP2]], ptr [[TMP6]], align 8
117119
; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[DST]], i64 16
118-
; CHECK-NEXT: [[TMP8:%.*]] = insertelement <2 x i64> <i64 0, i64 poison>, i64 [[TMP2]], i32 1
119-
; CHECK-NEXT: store <2 x i64> [[TMP8]], ptr [[TMP7]], align 8
120+
; CHECK-NEXT: store i64 0, ptr [[TMP7]], align 8
120121
; CHECK-NEXT: br label %[[BB4]]
121122
;
122-
; Looks like there is bug in TTI, where insertion into index 1 is free, while insertion in to index 0 is 1.
123-
; REMARK: Function: fun2
123+
; REMARK-NOT: Function: fun2
124124

125125
%3 = load i64, ptr %0, align 8
126126
%4 = icmp eq i64 %3, 0

‎llvm/test/Transforms/SLPVectorizer/full-overlap-non-schedulable.ll

Lines changed: 22 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -1,35 +1,37 @@
11
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
2-
; RUN: opt -S --passes=slp-vectorizer < %s | FileCheck %s
2+
; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7-avx < %s \
3+
; RUN: | FileCheck %s
4+
; REQUIRES: x86-registered-target
35

46
define void @test(ptr %p1, ptr %0, i32 %1, i1 %c1, ptr %p2) {
57
; CHECK-LABEL: define void @test(
6-
; CHECK-SAME: ptr [[P1:%.*]], ptr [[TMP0:%.*]], i32 [[TMP1:%.*]], i1 [[C1:%.*]], ptr [[P2:%.*]]) {
8+
; CHECK-SAME: ptr [[P1:%.*]], ptr [[TMP0:%.*]], i32 [[TMP1:%.*]], i1 [[C1:%.*]], ptr [[P2:%.*]]) #[[ATTR0:[0-9]+]] {
79
; CHECK-NEXT: [[TOP:.*:]]
810
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP0]], i64 8
9-
; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP0]], i64 12
11+
; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i64 12
1012
; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i64 16
1113
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i64 20
1214
; CHECK-NEXT: br i1 [[C1]], label %[[L42:.*]], label %[[L41:.*]]
1315
; CHECK: [[L41]]:
1416
; CHECK-NEXT: [[DOTNOT276:%.*]] = icmp eq ptr [[TMP2]], null
15-
; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP2]], align 4
16-
; CHECK-NEXT: [[TMP7:%.*]] = select i1 [[DOTNOT276]], i32 0, i32 [[TMP10]]
17-
; CHECK-NEXT: [[DOTNOT277:%.*]] = icmp eq ptr [[TMP12]], null
18-
; CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP12]], align 4
17+
; CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP2]], align 4
18+
; CHECK-NEXT: [[TMP7:%.*]] = select i1 [[DOTNOT276]], i32 0, i32 [[TMP6]]
19+
; CHECK-NEXT: [[DOTNOT277:%.*]] = icmp eq ptr [[TMP3]], null
20+
; CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP3]], align 4
1921
; CHECK-NEXT: [[TMP9:%.*]] = select i1 [[DOTNOT277]], i32 0, i32 [[TMP8]]
2022
; CHECK-NEXT: [[DOTNOT278:%.*]] = icmp eq ptr [[TMP4]], null
21-
; CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP4]], align 4
22-
; CHECK-NEXT: [[TMP11:%.*]] = select i1 [[DOTNOT278]], i32 0, i32 [[TMP15]]
23+
; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP4]], align 4
24+
; CHECK-NEXT: [[TMP11:%.*]] = select i1 [[DOTNOT278]], i32 0, i32 [[TMP10]]
2325
; CHECK-NEXT: [[DOTNOT279:%.*]] = icmp eq ptr [[TMP5]], null
24-
; CHECK-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP5]], align 4
25-
; CHECK-NEXT: [[TMP25:%.*]] = select i1 [[DOTNOT279]], i32 0, i32 [[TMP20]]
26+
; CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP5]], align 4
27+
; CHECK-NEXT: [[TMP13:%.*]] = select i1 [[DOTNOT279]], i32 0, i32 [[TMP12]]
2628
; CHECK-NEXT: br label %[[L112:.*]]
2729
; CHECK: [[L42]]:
2830
; CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP2]], align 4
2931
; CHECK-NEXT: [[DOTNOT280:%.*]] = icmp eq i32 [[TMP14]], 0
3032
; CHECK-NEXT: br i1 [[DOTNOT280]], label %[[L112]], label %[[L47:.*]]
3133
; CHECK: [[L47]]:
32-
; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4
34+
; CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP3]], align 4
3335
; CHECK-NEXT: [[DOTNOT282:%.*]] = icmp eq ptr [[TMP4]], null
3436
; CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP4]], align 4
3537
; CHECK-NEXT: [[TMP17:%.*]] = select i1 [[DOTNOT282]], i32 0, i32 [[TMP16]]
@@ -38,14 +40,14 @@ define void @test(ptr %p1, ptr %0, i32 %1, i1 %c1, ptr %p2) {
3840
; CHECK-NEXT: [[TMP19:%.*]] = select i1 [[DOTNOT283]], i32 0, i32 [[TMP18]]
3941
; CHECK-NEXT: br label %[[L112]]
4042
; CHECK: [[L112]]:
41-
; CHECK-NEXT: [[TMP24:%.*]] = phi i32 [ [[TMP19]], %[[L47]] ], [ [[TMP25]], %[[L41]] ], [ 0, %[[L42]] ]
42-
; CHECK-NEXT: [[TMP23:%.*]] = phi i32 [ [[TMP17]], %[[L47]] ], [ [[TMP11]], %[[L41]] ], [ [[TMP1]], %[[L42]] ]
43-
; CHECK-NEXT: [[TMP22:%.*]] = phi i32 [ [[TMP13]], %[[L47]] ], [ [[TMP9]], %[[L41]] ], [ 0, %[[L42]] ]
44-
; CHECK-NEXT: [[TMP21:%.*]] = phi i32 [ 0, %[[L47]] ], [ [[TMP7]], %[[L41]] ], [ 0, %[[L42]] ]
45-
; CHECK-NEXT: store i32 [[TMP21]], ptr [[P2]], align 4
46-
; CHECK-NEXT: store i32 [[TMP22]], ptr [[P1]], align 4
47-
; CHECK-NEXT: store i32 [[TMP23]], ptr [[P2]], align 4
48-
; CHECK-NEXT: store i32 [[TMP24]], ptr [[P1]], align 4
43+
; CHECK-NEXT: [[VALUE_PHI13336:%.*]] = phi i32 [ [[TMP19]], %[[L47]] ], [ [[TMP13]], %[[L41]] ], [ 0, %[[L42]] ]
44+
; CHECK-NEXT: [[VALUE_PHI12335:%.*]] = phi i32 [ [[TMP17]], %[[L47]] ], [ [[TMP11]], %[[L41]] ], [ [[TMP1]], %[[L42]] ]
45+
; CHECK-NEXT: [[VALUE_PHI11334:%.*]] = phi i32 [ [[TMP15]], %[[L47]] ], [ [[TMP9]], %[[L41]] ], [ 0, %[[L42]] ]
46+
; CHECK-NEXT: [[VALUE_PHI10333:%.*]] = phi i32 [ 0, %[[L47]] ], [ [[TMP7]], %[[L41]] ], [ 0, %[[L42]] ]
47+
; CHECK-NEXT: store i32 [[VALUE_PHI10333]], ptr [[P2]], align 4
48+
; CHECK-NEXT: store i32 [[VALUE_PHI11334]], ptr [[P1]], align 4
49+
; CHECK-NEXT: store i32 [[VALUE_PHI12335]], ptr [[P2]], align 4
50+
; CHECK-NEXT: store i32 [[VALUE_PHI13336]], ptr [[P1]], align 4
4951
; CHECK-NEXT: ret void
5052
;
5153
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