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[RISCV] Improve test coverage for #87950
Noticed in review that we want both the LUI and LUI/ADDI cases with different behavior for each.
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llvm/test/CodeGen/RISCV/prolog-epilogue.ll

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@@ -181,6 +181,50 @@ define void @frame_4kb() {
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ret void
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}
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define void @frame_4kb_offset_128() {
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; RV32-LABEL: frame_4kb_offset_128:
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; RV32: # %bb.0:
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; RV32-NEXT: addi sp, sp, -2032
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; RV32-NEXT: .cfi_def_cfa_offset 2032
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; RV32-NEXT: sw ra, 2028(sp) # 4-byte Folded Spill
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; RV32-NEXT: .cfi_offset ra, -4
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; RV32-NEXT: lui a0, 1
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; RV32-NEXT: addi a0, a0, 128
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; RV32-NEXT: sub sp, sp, a0
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; RV32-NEXT: .cfi_def_cfa_offset 6256
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; RV32-NEXT: addi a0, sp, 12
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; RV32-NEXT: call callee
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; RV32-NEXT: lui a0, 1
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; RV32-NEXT: addi a0, a0, 128
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; RV32-NEXT: add sp, sp, a0
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; RV32-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload
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; RV32-NEXT: addi sp, sp, 2032
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; RV32-NEXT: ret
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;
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; RV64-LABEL: frame_4kb_offset_128:
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; RV64: # %bb.0:
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; RV64-NEXT: addi sp, sp, -2032
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; RV64-NEXT: .cfi_def_cfa_offset 2032
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; RV64-NEXT: sd ra, 2024(sp) # 8-byte Folded Spill
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; RV64-NEXT: .cfi_offset ra, -8
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; RV64-NEXT: lui a0, 1
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; RV64-NEXT: addiw a0, a0, 128
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; RV64-NEXT: sub sp, sp, a0
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; RV64-NEXT: .cfi_def_cfa_offset 6256
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; RV64-NEXT: addi a0, sp, 8
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; RV64-NEXT: call callee
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; RV64-NEXT: lui a0, 1
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; RV64-NEXT: addiw a0, a0, 128
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; RV64-NEXT: add sp, sp, a0
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; RV64-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload
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; RV64-NEXT: addi sp, sp, 2032
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; RV64-NEXT: ret
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%a = alloca [6240 x i8]
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call void @callee(ptr %a)
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ret void
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}
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;; 2^13-16+2032
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define void @frame_8kb() {
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; RV32-LABEL: frame_8kb:
@@ -221,6 +265,92 @@ define void @frame_8kb() {
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ret void
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}
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define void @frame_8kb_offset_128() {
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; RV32-LABEL: frame_8kb_offset_128:
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; RV32: # %bb.0:
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; RV32-NEXT: addi sp, sp, -2032
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; RV32-NEXT: .cfi_def_cfa_offset 2032
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; RV32-NEXT: sw ra, 2028(sp) # 4-byte Folded Spill
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; RV32-NEXT: .cfi_offset ra, -4
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; RV32-NEXT: lui a0, 2
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; RV32-NEXT: addi a0, a0, 128
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; RV32-NEXT: sub sp, sp, a0
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; RV32-NEXT: .cfi_def_cfa_offset 10352
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; RV32-NEXT: addi a0, sp, 12
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; RV32-NEXT: call callee
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; RV32-NEXT: lui a0, 2
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; RV32-NEXT: addi a0, a0, 128
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; RV32-NEXT: add sp, sp, a0
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; RV32-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload
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; RV32-NEXT: addi sp, sp, 2032
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; RV32-NEXT: ret
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;
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; RV64-LABEL: frame_8kb_offset_128:
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; RV64: # %bb.0:
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; RV64-NEXT: addi sp, sp, -2032
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; RV64-NEXT: .cfi_def_cfa_offset 2032
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; RV64-NEXT: sd ra, 2024(sp) # 8-byte Folded Spill
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; RV64-NEXT: .cfi_offset ra, -8
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; RV64-NEXT: lui a0, 2
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; RV64-NEXT: addiw a0, a0, 128
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; RV64-NEXT: sub sp, sp, a0
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; RV64-NEXT: .cfi_def_cfa_offset 10352
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; RV64-NEXT: addi a0, sp, 8
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; RV64-NEXT: call callee
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; RV64-NEXT: lui a0, 2
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; RV64-NEXT: addiw a0, a0, 128
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; RV64-NEXT: add sp, sp, a0
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; RV64-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload
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; RV64-NEXT: addi sp, sp, 2032
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; RV64-NEXT: ret
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%a = alloca [10336 x i8]
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call void @callee(ptr %a)
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ret void
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}
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define void @frame_16kb_minus_80() {
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; RV32-LABEL: frame_16kb_minus_80:
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; RV32: # %bb.0:
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; RV32-NEXT: addi sp, sp, -2032
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; RV32-NEXT: .cfi_def_cfa_offset 2032
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; RV32-NEXT: sw ra, 2028(sp) # 4-byte Folded Spill
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; RV32-NEXT: .cfi_offset ra, -4
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; RV32-NEXT: lui a0, 4
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; RV32-NEXT: addi a0, a0, -80
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; RV32-NEXT: sub sp, sp, a0
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; RV32-NEXT: .cfi_def_cfa_offset 18336
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; RV32-NEXT: addi a0, sp, 12
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; RV32-NEXT: call callee
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; RV32-NEXT: lui a0, 4
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; RV32-NEXT: addi a0, a0, -80
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; RV32-NEXT: add sp, sp, a0
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; RV32-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload
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; RV32-NEXT: addi sp, sp, 2032
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; RV32-NEXT: ret
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;
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; RV64-LABEL: frame_16kb_minus_80:
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; RV64: # %bb.0:
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; RV64-NEXT: addi sp, sp, -2032
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; RV64-NEXT: .cfi_def_cfa_offset 2032
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; RV64-NEXT: sd ra, 2024(sp) # 8-byte Folded Spill
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; RV64-NEXT: .cfi_offset ra, -8
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; RV64-NEXT: lui a0, 4
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; RV64-NEXT: addiw a0, a0, -80
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; RV64-NEXT: sub sp, sp, a0
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; RV64-NEXT: .cfi_def_cfa_offset 18336
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; RV64-NEXT: addi a0, sp, 8
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; RV64-NEXT: call callee
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; RV64-NEXT: lui a0, 4
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; RV64-NEXT: addiw a0, a0, -80
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; RV64-NEXT: add sp, sp, a0
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; RV64-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload
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; RV64-NEXT: addi sp, sp, 2032
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; RV64-NEXT: ret
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%a = alloca [18320 x i8]
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call void @callee(ptr %a)
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ret void
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}
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;; 2^14-16+2032
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define void @frame_16kb() {
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; RV32-LABEL: frame_16kb:

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