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Sjoerd Meijer
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[LSR] Add a flag that overrides the target's preferred addressing mode
This adds a new flag -lsr-preferred-addressing-mode to override the target's preferred addressing mode. It replaces flag -lsr-backedge-indexing, which is equivalent to preindexed addressing that is one of the options that -lsr-preferred-addressing-mode accepts. Differential Revision: https://reviews.llvm.org/D96855
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3 files changed

+49
-16
lines changed

3 files changed

+49
-16
lines changed

‎llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp

Lines changed: 15 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -161,9 +161,18 @@ static cl::opt<bool> FilterSameScaledReg(
161161
cl::desc("Narrow LSR search space by filtering non-optimal formulae"
162162
" with the same ScaledReg and Scale"));
163163

164-
static cl::opt<bool> EnableBackedgeIndexing(
165-
"lsr-backedge-indexing", cl::Hidden, cl::init(true),
166-
cl::desc("Enable the generation of cross iteration indexed memops"));
164+
static cl::opt<TTI::AddressingModeKind> PreferredAddresingMode(
165+
"lsr-preferred-addressing-mode", cl::Hidden, cl::init(TTI::AMK_None),
166+
cl::desc("A flag that overrides the target's preferred addressing mode."),
167+
cl::values(clEnumValN(TTI::AMK_None,
168+
"none",
169+
"Don't prefer any addressing mode"),
170+
clEnumValN(TTI::AMK_PreIndexed,
171+
"preindexed",
172+
"Prefer pre-indexed addressing mode"),
173+
clEnumValN(TTI::AMK_PostIndexed,
174+
"postindexed",
175+
"Prefer post-indexed addressing mode")));
167176

168177
static cl::opt<unsigned> ComplexityLimit(
169178
"lsr-complexity-limit", cl::Hidden,
@@ -3810,9 +3819,7 @@ void LSRInstance::GenerateConstantOffsetsImpl(
38103819
// means that a single pre-indexed access can be generated to become the new
38113820
// base pointer for each iteration of the loop, resulting in no extra add/sub
38123821
// instructions for pointer updating.
3813-
bool FavorPreIndexed = EnableBackedgeIndexing &&
3814-
AMK == TTI::AMK_PreIndexed;
3815-
if (FavorPreIndexed && LU.Kind == LSRUse::Address) {
3822+
if (AMK == TTI::AMK_PreIndexed && LU.Kind == LSRUse::Address) {
38163823
if (auto *GAR = dyn_cast<SCEVAddRecExpr>(G)) {
38173824
if (auto *StepRec =
38183825
dyn_cast<SCEVConstant>(GAR->getStepRecurrence(SE))) {
@@ -5561,7 +5568,8 @@ LSRInstance::LSRInstance(Loop *L, IVUsers &IU, ScalarEvolution &SE,
55615568
const TargetTransformInfo &TTI, AssumptionCache &AC,
55625569
TargetLibraryInfo &TLI, MemorySSAUpdater *MSSAU)
55635570
: IU(IU), SE(SE), DT(DT), LI(LI), AC(AC), TLI(TLI), TTI(TTI), L(L),
5564-
MSSAU(MSSAU), AMK(TTI.getPreferredAddressingMode(L, &SE)) {
5571+
MSSAU(MSSAU), AMK(PreferredAddresingMode.getNumOccurrences() > 0 ?
5572+
PreferredAddresingMode : TTI.getPreferredAddressingMode(L, &SE)) {
55655573
// If LoopSimplify form is not available, stay out of trouble.
55665574
if (!L->isLoopSimplifyForm())
55675575
return;

‎llvm/test/CodeGen/ARM/dsp-loop-indexing.ll

Lines changed: 16 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,19 @@
1-
; RUN: llc -mtriple=thumbv7em -mattr=+fp-armv8 %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-DEFAULT
2-
; RUN: llc -mtriple=thumbv8m.main -mattr=+fp-armv8,+dsp %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-DEFAULT
3-
; RUN: llc -mtriple=thumbv8m.main -mattr=+fp-armv8,+dsp -lsr-backedge-indexing=false %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=DISABLED
4-
; RUN: llc -mtriple=thumbv8 %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=DISABLED
5-
; RUN: llc -mtriple=thumbv8m.main -mattr=+fp-armv8,+dsp -lsr-complexity-limit=2147483647 %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-COMPLEX
1+
; RUN: llc -mtriple=thumbv7em -mattr=+fp-armv8 %s -o - | \
2+
; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-DEFAULT
3+
4+
; RUN: llc -mtriple=thumbv8m.main -mattr=+fp-armv8,+dsp %s -o - | \
5+
; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-DEFAULT
6+
7+
; -lsr-backedge-indexing=false
8+
9+
; RUN: llc -mtriple=thumbv8m.main -mattr=+fp-armv8,+dsp -lsr-preferred-addressing-mode=postindexed %s -o - | \
10+
; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=DISABLED
11+
12+
; RUN: llc -mtriple=thumbv8 %s -o - | \
13+
; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=DISABLED
14+
15+
; RUN: llc -mtriple=thumbv8m.main -mattr=+fp-armv8,+dsp -lsr-complexity-limit=2147483647 %s -o - | \
16+
; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-COMPLEX
617

718
; CHECK-LABEL: test_qadd_2
819
; CHECK: @ %loop

‎llvm/test/CodeGen/ARM/loop-indexing.ll

Lines changed: 18 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,23 @@
1-
; RUN: llc --mtriple=thumbv7em -mattr=+fp-armv8 -O3 %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-DEFAULT --check-prefix=CHECK-T2
2-
; RUN: llc -mtriple=thumbv8m.main -mattr=+fp-armv8,+dsp -O3 %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-DEFAULT --check-prefix=CHECK-T2
3-
; RUN: llc -mtriple=thumbv8m.main -mattr=+fp-armv8,+dsp -lsr-backedge-indexing=false %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=DISABLED
1+
; RUN: llc --mtriple=thumbv7em -mattr=+fp-armv8 -O3 %s -o - | \
2+
; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-DEFAULT --check-prefix=CHECK-T2
3+
4+
; RUN: llc --mtriple=thumbv7em -mattr=+fp-armv8 -O3 -lsr-preferred-addressing-mode=none %s -o - | \
5+
; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=DISABLED
6+
7+
; RUN: llc -mtriple=thumbv8m.main -mattr=+fp-armv8,+dsp -O3 %s -o - | \
8+
; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-DEFAULT --check-prefix=CHECK-T2
9+
10+
; RUN: llc -mtriple=thumbv8m.main -mattr=+fp-armv8,+dsp -lsr-preferred-addressing-mode=postindexed %s -o - | \
11+
; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=DISABLED
12+
13+
; RUN: llc -mtriple=thumbv8m.main -mattr=+fp-armv8,+dsp -lsr-preferred-addressing-mode=preindexed %s -o - | \
14+
; RUN: FileCheck %s --check-prefixes=CHECK,CHECK-T2
15+
416
; RUN: llc -mtriple=thumbv8m.base %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=DISABLED
517
; RUN: llc -mtriple=thumbv8 %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=DISABLED
6-
; RUN: llc -mtriple=thumbv8m.main -mattr=+fp-armv8,+dsp -O3 -lsr-complexity-limit=2147483647 %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-COMPLEX --check-prefix=CHECK-T2
18+
19+
; RUN: llc -mtriple=thumbv8m.main -mattr=+fp-armv8,+dsp -O3 -lsr-complexity-limit=2147483647 %s -o - | \
20+
; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-COMPLEX --check-prefix=CHECK-T2
721

822
; Tests to check that post increment addressing modes are used instead of
923
; updating base pointers with add instructions.

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