Skip to content

Commit f7cddf8

Browse files
authored
[TableGen] Use std::move instead of swap. NFC. (#81606)
Historically TableGen has used `A.swap(B)` to move containers without the expense of copying them. Perhaps this predated rvalue references. In any case `A = std::move(B)` seems like a more direct way to implement this when only A is required after the operation.
1 parent d759618 commit f7cddf8

File tree

5 files changed

+11
-12
lines changed

5 files changed

+11
-12
lines changed

llvm/utils/TableGen/AsmMatcherEmitter.cpp

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1269,11 +1269,10 @@ void AsmMatcherInfo::buildRegisterClasses(
12691269
}
12701270

12711271
RegisterSet Tmp;
1272-
std::swap(Tmp, ContainingSet);
1273-
std::insert_iterator<RegisterSet> II(ContainingSet,
1274-
ContainingSet.begin());
1275-
std::set_intersection(Tmp.begin(), Tmp.end(), RS.begin(), RS.end(), II,
1276-
LessRecordByID());
1272+
std::insert_iterator<RegisterSet> II(Tmp, Tmp.begin());
1273+
std::set_intersection(ContainingSet.begin(), ContainingSet.end(),
1274+
RS.begin(), RS.end(), II, LessRecordByID());
1275+
ContainingSet = std::move(Tmp);
12771276
}
12781277

12791278
if (!ContainingSet.empty()) {

llvm/utils/TableGen/CodeGenRegisters.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1964,9 +1964,9 @@ void CodeGenRegBank::pruneUnitSets() {
19641964
for (unsigned i = 0, e = SuperSetIDs.size(); i != e; ++i) {
19651965
unsigned SuperIdx = SuperSetIDs[i];
19661966
PrunedUnitSets[i].Name = RegUnitSets[SuperIdx].Name;
1967-
PrunedUnitSets[i].Units.swap(RegUnitSets[SuperIdx].Units);
1967+
PrunedUnitSets[i].Units = std::move(RegUnitSets[SuperIdx].Units);
19681968
}
1969-
RegUnitSets.swap(PrunedUnitSets);
1969+
RegUnitSets = std::move(PrunedUnitSets);
19701970
}
19711971

19721972
// Create a RegUnitSet for each RegClass that contains all units in the class
@@ -2139,7 +2139,7 @@ void CodeGenRegBank::computeRegUnitSets() {
21392139
if (RCUnitSetsIdx == RegClassUnitSets.size()) {
21402140
// Create a new list of UnitSets as a "fake" register class.
21412141
RegClassUnitSets.resize(RCUnitSetsIdx + 1);
2142-
RegClassUnitSets[RCUnitSetsIdx].swap(RUSets);
2142+
RegClassUnitSets[RCUnitSetsIdx] = std::move(RUSets);
21432143
}
21442144
}
21452145
}

llvm/utils/TableGen/CodeGenSchedule.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1788,7 +1788,7 @@ void CodeGenSchedModels::inferFromRW(ArrayRef<unsigned> OperWrites,
17881788
for (const PredTransition &Trans : LastTransitions)
17891789
SubstitutedAny |= Transitions.substituteVariants(Trans);
17901790
LLVM_DEBUG(Transitions.dump());
1791-
LastTransitions.swap(Transitions.TransVec);
1791+
LastTransitions = std::move(Transitions.TransVec);
17921792
} while (SubstitutedAny);
17931793

17941794
// WARNING: We are about to mutate the SchedClasses vector. Do not refer to

llvm/utils/TableGen/GlobalISelMatchTable.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -545,8 +545,8 @@ void GroupMatcher::optimize() {
545545
if (T != E)
546546
F = ++T;
547547
}
548-
optimizeRules<GroupMatcher>(Matchers, MatcherStorage).swap(Matchers);
549-
optimizeRules<SwitchMatcher>(Matchers, MatcherStorage).swap(Matchers);
548+
Matchers = optimizeRules<GroupMatcher>(Matchers, MatcherStorage);
549+
Matchers = optimizeRules<SwitchMatcher>(Matchers, MatcherStorage);
550550
}
551551

552552
//===- SwitchMatcher ------------------------------------------------------===//

llvm/utils/TableGen/SubtargetEmitter.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1649,7 +1649,7 @@ static void collectProcessorIndices(const CodeGenSchedClass &SC,
16491649
IdxVec PI;
16501650
std::set_union(&T.ProcIndex, &T.ProcIndex + 1, ProcIndices.begin(),
16511651
ProcIndices.end(), std::back_inserter(PI));
1652-
ProcIndices.swap(PI);
1652+
ProcIndices = std::move(PI);
16531653
}
16541654
}
16551655

0 commit comments

Comments
 (0)