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Kai Luo
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llvm/lib/Target/PowerPC/PPCISelLowering.cpp

Lines changed: 41 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -12661,6 +12661,44 @@ PPCTargetLowering::emitProbedAlloca(MachineInstr &MI,
1266112661
return TailMBB;
1266212662
}
1266312663

12664+
static bool IsSelectCC(MachineInstr &MI) {
12665+
switch (MI.getOpcode()) {
12666+
case PPC::SELECT_CC_I4:
12667+
case PPC::SELECT_CC_I8:
12668+
case PPC::SELECT_CC_F4:
12669+
case PPC::SELECT_CC_F8:
12670+
case PPC::SELECT_CC_F16:
12671+
case PPC::SELECT_CC_VRRC:
12672+
case PPC::SELECT_CC_VSFRC:
12673+
case PPC::SELECT_CC_VSSRC:
12674+
case PPC::SELECT_CC_VSRC:
12675+
case PPC::SELECT_CC_SPE4:
12676+
case PPC::SELECT_CC_SPE:
12677+
return true;
12678+
default:
12679+
return false;
12680+
}
12681+
}
12682+
12683+
static bool IsSelect(MachineInstr &MI) {
12684+
switch (MI.getOpcode()) {
12685+
case PPC::SELECT_I4:
12686+
case PPC::SELECT_I8:
12687+
case PPC::SELECT_F4:
12688+
case PPC::SELECT_F8:
12689+
case PPC::SELECT_F16:
12690+
case PPC::SELECT_SPE:
12691+
case PPC::SELECT_SPE4:
12692+
case PPC::SELECT_VRRC:
12693+
case PPC::SELECT_VSFRC:
12694+
case PPC::SELECT_VSSRC:
12695+
case PPC::SELECT_VSRC:
12696+
return true;
12697+
default:
12698+
return false;
12699+
}
12700+
}
12701+
1266412702
MachineBasicBlock *
1266512703
PPCTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
1266612704
MachineBasicBlock *BB) const {
@@ -12689,7 +12727,6 @@ PPCTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
1268912727
}
1269012728

1269112729
const TargetInstrInfo *TII = Subtarget.getInstrInfo();
12692-
const bool HasISEL = Subtarget.hasISEL();
1269312730

1269412731
// To "insert" these instructions we actually have to insert their
1269512732
// control-flow patterns.
@@ -12699,7 +12736,7 @@ PPCTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
1269912736
MachineFunction *F = BB->getParent();
1270012737
MachineRegisterInfo &MRI = F->getRegInfo();
1270112738

12702-
if (HasISEL &&
12739+
if (Subtarget.hasISEL() &&
1270312740
(MI.getOpcode() == PPC::SELECT_CC_I4 ||
1270412741
MI.getOpcode() == PPC::SELECT_CC_I8 ||
1270512742
MI.getOpcode() == PPC::SELECT_I4 || MI.getOpcode() == PPC::SELECT_I8)) {
@@ -12714,28 +12751,7 @@ PPCTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
1271412751
DebugLoc dl = MI.getDebugLoc();
1271512752
TII->insertSelect(*BB, MI, dl, MI.getOperand(0).getReg(), Cond,
1271612753
MI.getOperand(2).getReg(), MI.getOperand(3).getReg());
12717-
} else if (MI.getOpcode() == PPC::SELECT_CC_I4 ||
12718-
MI.getOpcode() == PPC::SELECT_CC_I8 ||
12719-
MI.getOpcode() == PPC::SELECT_CC_F4 ||
12720-
MI.getOpcode() == PPC::SELECT_CC_F8 ||
12721-
MI.getOpcode() == PPC::SELECT_CC_F16 ||
12722-
MI.getOpcode() == PPC::SELECT_CC_VRRC ||
12723-
MI.getOpcode() == PPC::SELECT_CC_VSFRC ||
12724-
MI.getOpcode() == PPC::SELECT_CC_VSSRC ||
12725-
MI.getOpcode() == PPC::SELECT_CC_VSRC ||
12726-
MI.getOpcode() == PPC::SELECT_CC_SPE4 ||
12727-
MI.getOpcode() == PPC::SELECT_CC_SPE ||
12728-
MI.getOpcode() == PPC::SELECT_I4 ||
12729-
MI.getOpcode() == PPC::SELECT_I8 ||
12730-
MI.getOpcode() == PPC::SELECT_F4 ||
12731-
MI.getOpcode() == PPC::SELECT_F8 ||
12732-
MI.getOpcode() == PPC::SELECT_F16 ||
12733-
MI.getOpcode() == PPC::SELECT_SPE ||
12734-
MI.getOpcode() == PPC::SELECT_SPE4 ||
12735-
MI.getOpcode() == PPC::SELECT_VRRC ||
12736-
MI.getOpcode() == PPC::SELECT_VSFRC ||
12737-
MI.getOpcode() == PPC::SELECT_VSSRC ||
12738-
MI.getOpcode() == PPC::SELECT_VSRC) {
12754+
} else if (IsSelectCC(MI) || IsSelect(MI)) {
1273912755
// The incoming instruction knows the destination vreg to set, the
1274012756
// condition code register to branch on, the true/false values to
1274112757
// select between, and a branch opcode to use.
@@ -12762,15 +12778,7 @@ PPCTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
1276212778
BB->addSuccessor(copy0MBB);
1276312779
BB->addSuccessor(sinkMBB);
1276412780

12765-
if (MI.getOpcode() == PPC::SELECT_I4 || MI.getOpcode() == PPC::SELECT_I8 ||
12766-
MI.getOpcode() == PPC::SELECT_F4 || MI.getOpcode() == PPC::SELECT_F8 ||
12767-
MI.getOpcode() == PPC::SELECT_F16 ||
12768-
MI.getOpcode() == PPC::SELECT_SPE4 ||
12769-
MI.getOpcode() == PPC::SELECT_SPE ||
12770-
MI.getOpcode() == PPC::SELECT_VRRC ||
12771-
MI.getOpcode() == PPC::SELECT_VSFRC ||
12772-
MI.getOpcode() == PPC::SELECT_VSSRC ||
12773-
MI.getOpcode() == PPC::SELECT_VSRC) {
12781+
if (IsSelect(MI)) {
1277412782
BuildMI(BB, dl, TII->get(PPC::BC))
1277512783
.addReg(MI.getOperand(1).getReg())
1277612784
.addMBB(sinkMBB);

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