@@ -12661,6 +12661,44 @@ PPCTargetLowering::emitProbedAlloca(MachineInstr &MI,
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return TailMBB;
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}
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+ static bool IsSelectCC(MachineInstr &MI) {
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+ switch (MI.getOpcode()) {
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+ case PPC::SELECT_CC_I4:
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+ case PPC::SELECT_CC_I8:
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+ case PPC::SELECT_CC_F4:
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+ case PPC::SELECT_CC_F8:
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+ case PPC::SELECT_CC_F16:
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+ case PPC::SELECT_CC_VRRC:
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+ case PPC::SELECT_CC_VSFRC:
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+ case PPC::SELECT_CC_VSSRC:
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+ case PPC::SELECT_CC_VSRC:
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+ case PPC::SELECT_CC_SPE4:
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+ case PPC::SELECT_CC_SPE:
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+ return true;
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+ default:
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+ return false;
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+ }
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+ }
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+
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+ static bool IsSelect(MachineInstr &MI) {
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+ switch (MI.getOpcode()) {
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+ case PPC::SELECT_I4:
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+ case PPC::SELECT_I8:
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+ case PPC::SELECT_F4:
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+ case PPC::SELECT_F8:
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+ case PPC::SELECT_F16:
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+ case PPC::SELECT_SPE:
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+ case PPC::SELECT_SPE4:
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+ case PPC::SELECT_VRRC:
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+ case PPC::SELECT_VSFRC:
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+ case PPC::SELECT_VSSRC:
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+ case PPC::SELECT_VSRC:
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+ return true;
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+ default:
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+ return false;
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+ }
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+ }
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+
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MachineBasicBlock *
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PPCTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
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MachineBasicBlock *BB) const {
@@ -12689,7 +12727,6 @@ PPCTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
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}
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const TargetInstrInfo *TII = Subtarget.getInstrInfo();
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- const bool HasISEL = Subtarget.hasISEL();
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// To "insert" these instructions we actually have to insert their
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// control-flow patterns.
@@ -12699,7 +12736,7 @@ PPCTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
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MachineFunction *F = BB->getParent();
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MachineRegisterInfo &MRI = F->getRegInfo();
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- if (HasISEL &&
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+ if (Subtarget.hasISEL() &&
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(MI.getOpcode() == PPC::SELECT_CC_I4 ||
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MI.getOpcode() == PPC::SELECT_CC_I8 ||
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MI.getOpcode() == PPC::SELECT_I4 || MI.getOpcode() == PPC::SELECT_I8)) {
@@ -12714,28 +12751,7 @@ PPCTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
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DebugLoc dl = MI.getDebugLoc();
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TII->insertSelect(*BB, MI, dl, MI.getOperand(0).getReg(), Cond,
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MI.getOperand(2).getReg(), MI.getOperand(3).getReg());
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- } else if (MI.getOpcode() == PPC::SELECT_CC_I4 ||
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- MI.getOpcode() == PPC::SELECT_CC_I8 ||
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- MI.getOpcode() == PPC::SELECT_CC_F4 ||
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- MI.getOpcode() == PPC::SELECT_CC_F8 ||
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- MI.getOpcode() == PPC::SELECT_CC_F16 ||
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- MI.getOpcode() == PPC::SELECT_CC_VRRC ||
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- MI.getOpcode() == PPC::SELECT_CC_VSFRC ||
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- MI.getOpcode() == PPC::SELECT_CC_VSSRC ||
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- MI.getOpcode() == PPC::SELECT_CC_VSRC ||
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- MI.getOpcode() == PPC::SELECT_CC_SPE4 ||
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- MI.getOpcode() == PPC::SELECT_CC_SPE ||
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- MI.getOpcode() == PPC::SELECT_I4 ||
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- MI.getOpcode() == PPC::SELECT_I8 ||
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- MI.getOpcode() == PPC::SELECT_F4 ||
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- MI.getOpcode() == PPC::SELECT_F8 ||
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- MI.getOpcode() == PPC::SELECT_F16 ||
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- MI.getOpcode() == PPC::SELECT_SPE ||
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- MI.getOpcode() == PPC::SELECT_SPE4 ||
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- MI.getOpcode() == PPC::SELECT_VRRC ||
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- MI.getOpcode() == PPC::SELECT_VSFRC ||
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- MI.getOpcode() == PPC::SELECT_VSSRC ||
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- MI.getOpcode() == PPC::SELECT_VSRC) {
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+ } else if (IsSelectCC(MI) || IsSelect(MI)) {
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// The incoming instruction knows the destination vreg to set, the
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// condition code register to branch on, the true/false values to
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// select between, and a branch opcode to use.
@@ -12762,15 +12778,7 @@ PPCTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
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BB->addSuccessor(copy0MBB);
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BB->addSuccessor(sinkMBB);
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- if (MI.getOpcode() == PPC::SELECT_I4 || MI.getOpcode() == PPC::SELECT_I8 ||
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- MI.getOpcode() == PPC::SELECT_F4 || MI.getOpcode() == PPC::SELECT_F8 ||
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- MI.getOpcode() == PPC::SELECT_F16 ||
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- MI.getOpcode() == PPC::SELECT_SPE4 ||
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- MI.getOpcode() == PPC::SELECT_SPE ||
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- MI.getOpcode() == PPC::SELECT_VRRC ||
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- MI.getOpcode() == PPC::SELECT_VSFRC ||
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- MI.getOpcode() == PPC::SELECT_VSSRC ||
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- MI.getOpcode() == PPC::SELECT_VSRC) {
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+ if (IsSelect(MI)) {
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BuildMI(BB, dl, TII->get(PPC::BC))
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.addReg(MI.getOperand(1).getReg())
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.addMBB(sinkMBB);
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