CodeGen: Refactor renameDisconnectedComponents() as a pass

Refactor LiveIntervals::renameDisconnectedComponents() to be a pass.
Also change the name to "RenameIndependentSubregs":

- renameDisconnectedComponents() worked on a MachineFunction at a time
  so it is a natural candidate for a machine function pass.

- The algorithm is testable with a .mir test now.

- This also fixes a problem where the lazy renaming as part of the
  MachineScheduler introduced IMPLICIT_DEF instructions after the number
  of a nodes in a region were counted leading to a mismatch.

Differential Revision: http://reviews.llvm.org/D20507

llvm-svn: 271345

Author: MatzeB

llvm/include/llvm/CodeGen/LiveInterval.h

@@ -864,77 +864,5 @@ namespace llvm {
     void Distribute(LiveInterval &LI, LiveInterval *LIV[],
                     MachineRegisterInfo &MRI);
   };
-
-  /// Helper class that can divide MachineOperands of a virtual register into
-  /// equivalence classes of connected components.
-  /// MachineOperands belong to the same equivalence class when they are part of
-  /// the same SubRange segment or adjacent segments (adjacent in control
-  /// flow); Different subranges affected by the same MachineOperand belong to
-  /// the same equivalence class.
-  ///
-  /// Example:
-  ///   vreg0:sub0 = ...
-  ///   vreg0:sub1 = ...
-  ///   vreg0:sub2 = ...
-  ///   ...
-  ///   xxx        = op vreg0:sub1
-  ///   vreg0:sub1 = ...
-  ///   store vreg0:sub0_sub1
-  ///
-  /// The example contains 3 different equivalence classes:
-  ///   - One for the (dead) vreg0:sub2 definition
-  ///   - One containing the first vreg0:sub1 definition and its use,
-  ///     but not the second definition!
-  ///   - The remaining class contains all other operands involving vreg0.
-  ///
-  /// We provide a utility function here to rename disjunct classes to different
-  /// virtual registers.
-  class ConnectedSubRegClasses {
-    LiveIntervals &LIS;
-    MachineRegisterInfo &MRI;
-    const TargetInstrInfo &TII;
-
-  public:
-    ConnectedSubRegClasses(LiveIntervals &LIS, MachineRegisterInfo &MRI,
-                           const TargetInstrInfo &TII)
-      : LIS(LIS), MRI(MRI), TII(TII) {}
-
-    /// Split unrelated subregister components and rename them to new vregs.
-    void renameComponents(LiveInterval &LI) const;
-
-  private:
-    struct SubRangeInfo {
-      ConnectedVNInfoEqClasses ConEQ;
-      LiveInterval::SubRange *SR;
-      unsigned Index;
-
-      SubRangeInfo(LiveIntervals &LIS, LiveInterval::SubRange &SR,
-                   unsigned Index)
-        : ConEQ(LIS), SR(&SR), Index(Index) {}
-    };
-
-    /// \brief Build a vector of SubRange infos and a union find set of
-    /// equivalence classes.
-    /// Returns true if more than 1 equivalence class was found.
-    bool findComponents(IntEqClasses &Classes,
-                        SmallVectorImpl<SubRangeInfo> &SubRangeInfos,
-                        LiveInterval &LI) const;
-
-    /// \brief Distribute the LiveInterval segments into the new LiveIntervals
-    /// belonging to their class.
-    void distribute(const IntEqClasses &Classes,
-                    const SmallVectorImpl<SubRangeInfo> &SubRangeInfos,
-                    const SmallVectorImpl<LiveInterval*> &Intervals) const;
-
-    /// \brief Constructs main liverange and add missing undef+dead flags.
-    void computeMainRangesFixFlags(const IntEqClasses &Classes,
-        const SmallVectorImpl<SubRangeInfo> &SubRangeInfos,
-        const SmallVectorImpl<LiveInterval*> &Intervals) const;
-
-    /// Rewrite Machine Operands to use the new vreg belonging to their class.
-    void rewriteOperands(const IntEqClasses &Classes,
-                         const SmallVectorImpl<SubRangeInfo> &SubRangeInfos,
-                         const SmallVectorImpl<LiveInterval*> &Intervals) const;
-  };
 }
 #endif

llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h

@@ -405,11 +405,6 @@ extern cl::opt<bool> UseSegmentSetForPhysRegs;
     void splitSeparateComponents(LiveInterval &LI,
                                  SmallVectorImpl<LiveInterval*> &SplitLIs);
 
-    /// Assure dead subregister definitions have their own vreg assigned.
-    /// This calls ConnectedSubRegClasses::splitSeparateSubRegComponent()
-    /// on each virtual register.
-    void renameDisconnectedComponents();
-
     /// For live interval \p LI with correct SubRanges construct matching
     /// information for the main live range. Expects the main live range to not
     /// have any segments or value numbers.

llvm/include/llvm/CodeGen/Passes.h

@@ -356,6 +356,11 @@ namespace llvm {
   /// This pass splits the stack into a safe stack and an unsafe stack to
   /// protect against stack-based overflow vulnerabilities.
   FunctionPass *createSafeStackPass(const TargetMachine *TM = nullptr);
+
+  /// This pass detects subregister lanes in a virtual register that are used
+  /// independently of other lanes and splits them into separate virtual
+  /// registers.
+  extern char &RenameIndependentSubregsID;
 } // End llvm namespace
 
 /// Target machine pass initializer for passes with dependencies. Use with

llvm/include/llvm/InitializePasses.h

@@ -266,6 +266,7 @@ void initializeRegionOnlyPrinterPass(PassRegistry&);
 void initializeRegionOnlyViewerPass(PassRegistry&);
 void initializeRegionPrinterPass(PassRegistry&);
 void initializeRegionViewerPass(PassRegistry&);
+void initializeRenameIndependentSubregsPass(PassRegistry&);
 void initializeReversePostOrderFunctionAttrsPass(PassRegistry&);
 void initializeRewriteStatepointsForGCPass(PassRegistry&);
 void initializeSafeStackPass(PassRegistry&);

llvm/lib/CodeGen/CMakeLists.txt

@@ -100,6 +100,7 @@ add_llvm_library(LLVMCodeGen
   RegisterCoalescer.cpp
   RegisterPressure.cpp
   RegisterScavenging.cpp
+  RenameIndependentSubregs.cpp
   SafeStack.cpp
   ScheduleDAG.cpp
   ScheduleDAGInstrs.cpp

llvm/lib/CodeGen/CodeGen.cpp

@@ -68,6 +68,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
   initializePreISelIntrinsicLoweringPass(Registry);
   initializeProcessImplicitDefsPass(Registry);
   initializeRegisterCoalescerPass(Registry);
+  initializeRenameIndependentSubregsPass(Registry);
   initializeShrinkWrapPass(Registry);
   initializeSlotIndexesPass(Registry);
   initializeStackColoringPass(Registry);