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[mlir][vector] Restrict narrow-type-emulation patterns
All patterns under `populateVectorNarrowTypeEmulationPatterns` assume a 1-D vector load/store (as opposed to n-D vector load/store). This is evident from `ConvertVectorTransferRead`, e.g., here: ```cpp auto newRead = rewriter.create<vector::TransferReadOp>( loc, VectorType::get(numElements, newElementType), adaptor.getSource(), getValueOrCreateConstantIndexOp(rewriter, loc, linearizedIndices), newPadding); auto bitCast = rewriter.create<vector::BitCastOp>( loc, VectorType::get(numElements * scale, oldElementType), newRead); ``` Attempts to use these patterns in more generic cases fail, as shown below: ```mlir func.func @vector_maskedload_2d_i8_negative( %idx1: index, %idx2: index, %num_elems: index, %passthru: vector<2x4xi8>) -> vector<2x4xi8> { %0 = memref.alloc() : memref<3x4xi8> %mask = vector.create_mask %num_elems, %num_elems : vector<2x4xi1> %1 = vector.maskedload %0[%idx1, %idx2], %mask, %passthru : memref<3x4xi8>, vector<2x4xi1>, vector<2x4xi8> into vector<2x4xi8> return %1 : vector<2x4xi8> } ``` For example, casting to i32 produces: ```bash error: 'vector.bitcast' op failed to verify that all of {source, result} have same rank %1 = vector.maskedload %0[%idx1, %idx2], %mask, %passthru : ^ ``` Instead of reworking these patterns (that's going to require much more effort), I’ve marked them as 1-D only and extended "TestEmulateNarrowTypePass" with an option to disable the Memref type converter - that's to be able to add negative tests (otherwise, the type converter throws an error we can't really test for). While not ideal, this workaround should suit a test pass.
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mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp

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@@ -225,6 +225,10 @@ struct ConvertVectorStore final : OpConversionPattern<vector::StoreOp> {
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matchAndRewrite(vector::StoreOp op, OpAdaptor adaptor,
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ConversionPatternRewriter &rewriter) const override {
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if (op.getValueToStore().getType().getRank() != 1)
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return rewriter.notifyMatchFailure(op,
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"only 1-D vectors are supported ATM");
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auto loc = op.getLoc();
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auto convertedType = cast<MemRefType>(adaptor.getBase().getType());
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Type oldElementType = op.getValueToStore().getType().getElementType();
@@ -291,6 +295,10 @@ struct ConvertVectorMaskedStore final
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matchAndRewrite(vector::MaskedStoreOp op, OpAdaptor adaptor,
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ConversionPatternRewriter &rewriter) const override {
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if (op.getValueToStore().getType().getRank() != 1)
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return rewriter.notifyMatchFailure(op,
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"only 1-D vectors are supported ATM");
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auto loc = op.getLoc();
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auto convertedType = cast<MemRefType>(adaptor.getBase().getType());
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Type oldElementType = op.getValueToStore().getType().getElementType();
@@ -391,6 +399,10 @@ struct ConvertVectorLoad final : OpConversionPattern<vector::LoadOp> {
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matchAndRewrite(vector::LoadOp op, OpAdaptor adaptor,
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ConversionPatternRewriter &rewriter) const override {
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if (op.getVectorType().getRank() != 1)
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return rewriter.notifyMatchFailure(op,
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"only 1-D vectors are supported ATM");
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auto loc = op.getLoc();
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auto convertedType = cast<MemRefType>(adaptor.getBase().getType());
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Type oldElementType = op.getType().getElementType();
@@ -492,6 +504,10 @@ struct ConvertVectorMaskedLoad final
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matchAndRewrite(vector::MaskedLoadOp op, OpAdaptor adaptor,
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ConversionPatternRewriter &rewriter) const override {
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if (op.getVectorType().getRank() != 1)
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return rewriter.notifyMatchFailure(op,
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"only 1-D vectors are supported ATM");
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auto loc = op.getLoc();
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auto convertedType = cast<MemRefType>(adaptor.getBase().getType());
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Type oldElementType = op.getType().getElementType();
@@ -643,6 +659,10 @@ struct ConvertVectorTransferRead final
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matchAndRewrite(vector::TransferReadOp op, OpAdaptor adaptor,
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ConversionPatternRewriter &rewriter) const override {
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if (op.getVectorType().getRank() != 1)
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return rewriter.notifyMatchFailure(op,
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"only 1-D vectors are supported ATM");
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auto loc = op.getLoc();
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auto convertedType = cast<MemRefType>(adaptor.getSource().getType());
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Type oldElementType = op.getType().getElementType();
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@@ -0,0 +1,112 @@
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// RUN: mlir-opt --test-emulate-narrow-int="arith-compute-bitwidth=1 memref-load-bitwidth=32 skip-memref-type-conversion" --split-input-file %s | FileCheck %s
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// These tests mimic tests from vector-narrow-type.mlir, but load/store 2-D
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// insted of 1-D vectors. That's currently not supported.
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///----------------------------------------------------------------------------------------
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/// vector.load
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///----------------------------------------------------------------------------------------
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func.func @vector_load_2d_i8_negative(%arg1: index, %arg2: index) -> vector<2x4xi8> {
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%0 = memref.alloc() : memref<3x4xi8>
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%1 = vector.load %0[%arg1, %arg2] : memref<3x4xi8>, vector<2x4xi8>
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return %1 : vector<2x4xi8>
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}
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// No support for loading 2D vectors - expect no conversions
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// CHECK-LABEL: func @vector_load_2d_i8_negative
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// CHECK: memref.alloc() : memref<3x4xi8>
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// CHECK-NOT: i32
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// -----
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///----------------------------------------------------------------------------------------
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/// vector.transfer_read
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///----------------------------------------------------------------------------------------
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func.func @vector_transfer_read_2d_i4_negative(%arg1: index, %arg2: index) -> vector<2x8xi4> {
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%c0 = arith.constant 0 : i4
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%0 = memref.alloc() : memref<3x8xi4>
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%1 = vector.transfer_read %0[%arg1, %arg2], %c0 {in_bounds = [true, true]} :
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memref<3x8xi4>, vector<2x8xi4>
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return %1 : vector<2x8xi4>
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}
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// CHECK-LABEL: func @vector_transfer_read_2d_i4_negative
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// CHECK: memref.alloc() : memref<3x8xi4>
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// CHECK-NOT: i32
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// -----
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///----------------------------------------------------------------------------------------
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/// vector.maskedload
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///----------------------------------------------------------------------------------------
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func.func @vector_maskedload_2d_i8_negative(%arg1: index, %arg2: index, %arg3: index, %passthru: vector<2x4xi8>) -> vector<2x4xi8> {
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%0 = memref.alloc() : memref<3x4xi8>
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%mask = vector.create_mask %arg3, %arg3 : vector<2x4xi1>
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%1 = vector.maskedload %0[%arg1, %arg2], %mask, %passthru :
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memref<3x4xi8>, vector<2x4xi1>, vector<2x4xi8> into vector<2x4xi8>
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return %1 : vector<2x4xi8>
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}
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// CHECK-LABEL: func @vector_maskedload_2d_i8_negative
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// CHECK: memref.alloc() : memref<3x4xi8>
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// CHECK-NOT: i32
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// -----
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///----------------------------------------------------------------------------------------
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/// vector.extract -> vector.masked_load
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///----------------------------------------------------------------------------------------
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func.func @vector_extract_maskedload_2d_i4_negative(%arg1: index) -> vector<8x8x16xi4> {
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%0 = memref.alloc() : memref<8x8x16xi4>
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%c0 = arith.constant 0 : index
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%c16 = arith.constant 16 : index
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%c8 = arith.constant 8 : index
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%cst_1 = arith.constant dense<0> : vector<8x8x16xi4>
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%cst_2 = arith.constant dense<0> : vector<16xi4>
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%27 = vector.create_mask %c8, %arg1, %c16 : vector<8x8x16xi1>
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%48 = vector.extract %27[0] : vector<8x16xi1> from vector<8x8x16xi1>
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%49 = vector.extract %48[0] : vector<16xi1> from vector<8x16xi1>
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%50 = vector.maskedload %0[%c0, %c0, %c0], %49, %cst_2 : memref<8x8x16xi4>, vector<16xi1>, vector<16xi4> into vector<16xi4>
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%63 = vector.insert %50, %cst_1 [0, 0] : vector<16xi4> into vector<8x8x16xi4>
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return %63 : vector<8x8x16xi4>
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}
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// CHECK-LABEL: func @vector_extract_maskedload_2d_i4_negative
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// CHECK: memref.alloc() : memref<8x8x16xi4>
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// CHECK-NOT: i32
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// -----
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///----------------------------------------------------------------------------------------
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/// vector.store
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///----------------------------------------------------------------------------------------
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func.func @vector_store_2d_i8_negative(%arg0: vector<8xi8>, %arg1: index, %arg2: index) {
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%0 = memref.alloc() : memref<4x8xi8>
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vector.store %arg0, %0[%arg1, %arg2] :memref<4x8xi8>, vector<8xi8>
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return
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}
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// CHECK-LABEL: func @vector_store_2d_i8_negative
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// CHECK: memref.alloc() : memref<4x8xi8>
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// CHECK-NOT: i32
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// -----
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///----------------------------------------------------------------------------------------
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/// vector.maskedstore
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///----------------------------------------------------------------------------------------
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func.func @vector_maskedstore_2d_i8_negative(%arg0: index, %arg1: index, %arg2: index, %value: vector<8xi8>) {
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%0 = memref.alloc() : memref<3x8xi8>
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%mask = vector.create_mask %arg2 : vector<8xi1>
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vector.maskedstore %0[%arg0, %arg1], %mask, %value : memref<3x8xi8>, vector<8xi1>, vector<8xi8>
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return
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}
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// CHECK-LABEL: func @vector_maskedstore_2d_i8_negative
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// CHECK: memref.alloc() : memref<3x8xi8>
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// CHECK-NOT: i32

mlir/test/lib/Dialect/MemRef/TestEmulateNarrowType.cpp

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@@ -78,7 +78,11 @@ struct TestEmulateNarrowTypePass
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IntegerType::get(ty.getContext(), arithComputeBitwidth));
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});
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memref::populateMemRefNarrowTypeEmulationConversions(typeConverter);
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// With the type converter enabled, we are effectively unable to write
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// negative tests. This is a workaround specifically for negative tests.
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if (!disableMemrefTypeConversion)
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memref::populateMemRefNarrowTypeEmulationConversions(typeConverter);
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ConversionTarget target(*ctx);
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target.addDynamicallyLegalOp<func::FuncOp>([&typeConverter](Operation *op) {
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return typeConverter.isLegal(cast<func::FuncOp>(op).getFunctionType());
@@ -109,6 +113,11 @@ struct TestEmulateNarrowTypePass
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Option<unsigned> arithComputeBitwidth{
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*this, "arith-compute-bitwidth",
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llvm::cl::desc("arith computation bit width"), llvm::cl::init(4)};
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Option<bool> disableMemrefTypeConversion{
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*this, "skip-memref-type-conversion",
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llvm::cl::desc("disable memref type conversion (to test failures)"),
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llvm::cl::init(false)};
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};
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} // namespace
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