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| 1 | +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ --version 3 |
| 2 | +// REQUIRES: amdgpu-registered-target |
| 3 | + |
| 4 | +// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fopenmp-targets=amdgcn-amd-amdhsa -fopenmp-force-usm -emit-llvm-bc %s -o %t-ppc-host.bc |
| 5 | +// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple amdgcn-amd-amdhsa -fopenmp-targets=amdgcn-amd-amdhsa -emit-llvm %s -fopenmp-force-usm -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck -check-prefix=CHECK-USM %s |
| 6 | + |
| 7 | +// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fopenmp-targets=amdgcn-amd-amdhsa -emit-llvm-bc %s -o %t-ppc-host.bc |
| 8 | +// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple amdgcn-amd-amdhsa -fopenmp-targets=amdgcn-amd-amdhsa -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck -check-prefix=CHECK-DEFAULT %s |
| 9 | +// expected-no-diagnostics |
| 10 | + |
| 11 | +extern "C" void *malloc(unsigned int b); |
| 12 | + |
| 13 | +int GI; |
| 14 | +#pragma omp declare target |
| 15 | +int *pGI; |
| 16 | +#pragma omp end declare target |
| 17 | + |
| 18 | +int main(void) { |
| 19 | + |
| 20 | + GI = 0; |
| 21 | + |
| 22 | + pGI = (int *) malloc(sizeof(int)); |
| 23 | + *pGI = 42; |
| 24 | + |
| 25 | +#pragma omp target map(pGI[:1], GI) |
| 26 | + { |
| 27 | + GI = 1; |
| 28 | + *pGI = 2; |
| 29 | + } |
| 30 | + |
| 31 | + return 0; |
| 32 | +} |
| 33 | + |
| 34 | +// CHECK-USM-LABEL: define weak_odr protected amdgpu_kernel void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l25( |
| 35 | +// CHECK-USM-SAME: ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[GI:%.*]]) #[[ATTR0:[0-9]+]] { |
| 36 | +// CHECK-USM-NEXT: entry: |
| 37 | +// CHECK-USM-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8, addrspace(5) |
| 38 | +// CHECK-USM-NEXT: [[GI_ADDR:%.*]] = alloca ptr, align 8, addrspace(5) |
| 39 | +// CHECK-USM-NEXT: [[DYN_PTR_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DYN_PTR_ADDR]] to ptr |
| 40 | +// CHECK-USM-NEXT: [[GI_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[GI_ADDR]] to ptr |
| 41 | +// CHECK-USM-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR_ASCAST]], align 8 |
| 42 | +// CHECK-USM-NEXT: store ptr [[GI]], ptr [[GI_ADDR_ASCAST]], align 8 |
| 43 | +// CHECK-USM-NEXT: [[TMP0:%.*]] = load ptr, ptr [[GI_ADDR_ASCAST]], align 8 |
| 44 | +// CHECK-USM-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr addrspacecast (ptr addrspace(1) @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l25_kernel_environment to ptr), ptr [[DYN_PTR]]) |
| 45 | +// CHECK-USM-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1 |
| 46 | +// CHECK-USM-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] |
| 47 | +// CHECK-USM: user_code.entry: |
| 48 | +// CHECK-USM-NEXT: store i32 1, ptr [[TMP0]], align 4 |
| 49 | +// CHECK-USM-NEXT: [[TMP2:%.*]] = load ptr, ptr @pGI_decl_tgt_ref_ptr, align 8 |
| 50 | +// CHECK-USM-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP2]], align 8 |
| 51 | +// CHECK-USM-NEXT: store i32 2, ptr [[TMP3]], align 4 |
| 52 | +// CHECK-USM-NEXT: call void @__kmpc_target_deinit() |
| 53 | +// CHECK-USM-NEXT: ret void |
| 54 | +// CHECK-USM: worker.exit: |
| 55 | +// CHECK-USM-NEXT: ret void |
| 56 | +// |
| 57 | +// |
| 58 | +// CHECK-DEFAULT-LABEL: define weak_odr protected amdgpu_kernel void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l25( |
| 59 | +// CHECK-DEFAULT-SAME: ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[GI:%.*]]) #[[ATTR0:[0-9]+]] { |
| 60 | +// CHECK-DEFAULT-NEXT: entry: |
| 61 | +// CHECK-DEFAULT-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8, addrspace(5) |
| 62 | +// CHECK-DEFAULT-NEXT: [[GI_ADDR:%.*]] = alloca ptr, align 8, addrspace(5) |
| 63 | +// CHECK-DEFAULT-NEXT: [[DYN_PTR_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DYN_PTR_ADDR]] to ptr |
| 64 | +// CHECK-DEFAULT-NEXT: [[GI_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[GI_ADDR]] to ptr |
| 65 | +// CHECK-DEFAULT-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR_ASCAST]], align 8 |
| 66 | +// CHECK-DEFAULT-NEXT: store ptr [[GI]], ptr [[GI_ADDR_ASCAST]], align 8 |
| 67 | +// CHECK-DEFAULT-NEXT: [[TMP0:%.*]] = load ptr, ptr [[GI_ADDR_ASCAST]], align 8 |
| 68 | +// CHECK-DEFAULT-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr addrspacecast (ptr addrspace(1) @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l25_kernel_environment to ptr), ptr [[DYN_PTR]]) |
| 69 | +// CHECK-DEFAULT-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1 |
| 70 | +// CHECK-DEFAULT-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] |
| 71 | +// CHECK-DEFAULT: user_code.entry: |
| 72 | +// CHECK-DEFAULT-NEXT: store i32 1, ptr [[TMP0]], align 4 |
| 73 | +// CHECK-DEFAULT-NEXT: [[TMP2:%.*]] = load ptr, ptr addrspacecast (ptr addrspace(1) @pGI to ptr), align 8 |
| 74 | +// CHECK-DEFAULT-NEXT: store i32 2, ptr [[TMP2]], align 4 |
| 75 | +// CHECK-DEFAULT-NEXT: call void @__kmpc_target_deinit() |
| 76 | +// CHECK-DEFAULT-NEXT: ret void |
| 77 | +// CHECK-DEFAULT: worker.exit: |
| 78 | +// CHECK-DEFAULT-NEXT: ret void |
| 79 | +// |
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