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topperctopperc
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fixup! add more tests.
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‎llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/fp-select-rv32.mir

Lines changed: 118 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -32,3 +32,121 @@ body: |
3232
PseudoRET implicit $f10_f
3333
3434
...
35+
---
36+
name: fp_select_gpr_use_s32
37+
legalized: true
38+
tracksRegLiveness: true
39+
body: |
40+
bb.0.entry:
41+
liveins: $x10, $f10_f, $f11_f
42+
43+
; RV32I-LABEL: name: fp_select_gpr_use_s32
44+
; RV32I: liveins: $x10, $f10_f, $f11_f
45+
; RV32I-NEXT: {{ $}}
46+
; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $x10
47+
; RV32I-NEXT: [[COPY1:%[0-9]+]]:fprb(s32) = COPY $f10_f
48+
; RV32I-NEXT: [[COPY2:%[0-9]+]]:fprb(s32) = COPY $f11_f
49+
; RV32I-NEXT: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1
50+
; RV32I-NEXT: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY]], [[C]]
51+
; RV32I-NEXT: [[SELECT:%[0-9]+]]:fprb(s32) = G_SELECT [[AND]](s32), [[COPY1]], [[COPY2]]
52+
; RV32I-NEXT: $x10 = COPY [[SELECT]](s32)
53+
; RV32I-NEXT: PseudoRET implicit $x10
54+
%3:_(s32) = COPY $x10
55+
%4:_(s32) = COPY $f10_f
56+
%5:_(s32) = COPY $f11_f
57+
%12:_(s32) = G_CONSTANT i32 1
58+
%11:_(s32) = G_AND %3, %12
59+
%10:_(s32) = G_SELECT %11(s32), %4, %5
60+
$x10 = COPY %10(s32)
61+
PseudoRET implicit $x10
62+
63+
...
64+
---
65+
name: fp_select_gpr_def_s32
66+
legalized: true
67+
tracksRegLiveness: true
68+
body: |
69+
bb.0.entry:
70+
liveins: $x10, $x11, $f10_f
71+
72+
; RV32I-LABEL: name: fp_select_gpr_def_s32
73+
; RV32I: liveins: $x10, $x11, $f10_f
74+
; RV32I-NEXT: {{ $}}
75+
; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $x10
76+
; RV32I-NEXT: [[COPY1:%[0-9]+]]:fprb(s32) = COPY $f10_f
77+
; RV32I-NEXT: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $x11
78+
; RV32I-NEXT: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1
79+
; RV32I-NEXT: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY]], [[C]]
80+
; RV32I-NEXT: [[COPY3:%[0-9]+]]:fprb(s32) = COPY [[COPY2]](s32)
81+
; RV32I-NEXT: [[SELECT:%[0-9]+]]:fprb(s32) = G_SELECT [[AND]](s32), [[COPY1]], [[COPY3]]
82+
; RV32I-NEXT: $f10_f = COPY [[SELECT]](s32)
83+
; RV32I-NEXT: PseudoRET implicit $f10_f
84+
%3:_(s32) = COPY $x10
85+
%4:_(s32) = COPY $f10_f
86+
%5:_(s32) = COPY $x11
87+
%12:_(s32) = G_CONSTANT i32 1
88+
%11:_(s32) = G_AND %3, %12
89+
%10:_(s32) = G_SELECT %11(s32), %4, %5
90+
$f10_f = COPY %10(s32)
91+
PseudoRET implicit $f10_f
92+
93+
...
94+
---
95+
name: fp_select_only_fpr_use_s32
96+
legalized: true
97+
tracksRegLiveness: true
98+
body: |
99+
bb.0.entry:
100+
liveins: $x10, $x11, $x12
101+
102+
; RV32I-LABEL: name: fp_select_only_fpr_use_s32
103+
; RV32I: liveins: $x10, $x11, $x12
104+
; RV32I-NEXT: {{ $}}
105+
; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $x10
106+
; RV32I-NEXT: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $x11
107+
; RV32I-NEXT: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $x12
108+
; RV32I-NEXT: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1
109+
; RV32I-NEXT: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY]], [[C]]
110+
; RV32I-NEXT: [[SELECT:%[0-9]+]]:gprb(s32) = G_SELECT [[AND]](s32), [[COPY1]], [[COPY2]]
111+
; RV32I-NEXT: $f10_f = COPY [[SELECT]](s32)
112+
; RV32I-NEXT: PseudoRET implicit $f10_f
113+
%3:_(s32) = COPY $x10
114+
%4:_(s32) = COPY $x11
115+
%5:_(s32) = COPY $x12
116+
%12:_(s32) = G_CONSTANT i32 1
117+
%11:_(s32) = G_AND %3, %12
118+
%10:_(s32) = G_SELECT %11(s32), %4, %5
119+
$f10_f = COPY %10(s32)
120+
PseudoRET implicit $f10_f
121+
122+
...
123+
---
124+
name: fp_select_only_one_fpr_def_s32
125+
legalized: true
126+
tracksRegLiveness: true
127+
body: |
128+
bb.0.entry:
129+
liveins: $x10, $x11, $f10_f
130+
131+
; RV32I-LABEL: name: fp_select_only_one_fpr_def_s32
132+
; RV32I: liveins: $x10, $x11, $f10_f
133+
; RV32I-NEXT: {{ $}}
134+
; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $x10
135+
; RV32I-NEXT: [[COPY1:%[0-9]+]]:fprb(s32) = COPY $f10_f
136+
; RV32I-NEXT: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $x11
137+
; RV32I-NEXT: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1
138+
; RV32I-NEXT: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY]], [[C]]
139+
; RV32I-NEXT: [[COPY3:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32)
140+
; RV32I-NEXT: [[SELECT:%[0-9]+]]:gprb(s32) = G_SELECT [[AND]](s32), [[COPY3]], [[COPY2]]
141+
; RV32I-NEXT: $x10 = COPY [[SELECT]](s32)
142+
; RV32I-NEXT: PseudoRET implicit $x10
143+
%3:_(s32) = COPY $x10
144+
%4:_(s32) = COPY $f10_f
145+
%5:_(s32) = COPY $x11
146+
%12:_(s32) = G_CONSTANT i32 1
147+
%11:_(s32) = G_AND %3, %12
148+
%10:_(s32) = G_SELECT %11(s32), %4, %5
149+
$x10 = COPY %10(s32)
150+
PseudoRET implicit $x10
151+
152+
...

‎llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/fp-select-rv64.mir

Lines changed: 182 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -61,3 +61,185 @@ body: |
6161
PseudoRET implicit $f10_d
6262
6363
...
64+
---
65+
name: fp_select_gpr_use_s32
66+
legalized: true
67+
tracksRegLiveness: true
68+
body: |
69+
bb.0.entry:
70+
liveins: $x10, $f10_f, $f11_f
71+
72+
; RV32I-LABEL: name: fp_select_gpr_use_s32
73+
; RV32I: liveins: $x10, $f10_f, $f11_f
74+
; RV32I-NEXT: {{ $}}
75+
; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
76+
; RV32I-NEXT: [[COPY1:%[0-9]+]]:fprb(s32) = COPY $f10_f
77+
; RV32I-NEXT: [[COPY2:%[0-9]+]]:fprb(s32) = COPY $f11_f
78+
; RV32I-NEXT: [[C:%[0-9]+]]:gprb(s64) = G_CONSTANT i64 1
79+
; RV32I-NEXT: [[AND:%[0-9]+]]:gprb(s64) = G_AND [[COPY]], [[C]]
80+
; RV32I-NEXT: [[SELECT:%[0-9]+]]:fprb(s32) = G_SELECT [[AND]](s64), [[COPY1]], [[COPY2]]
81+
; RV32I-NEXT: [[COPY3:%[0-9]+]]:gprb(s32) = COPY [[SELECT]](s32)
82+
; RV32I-NEXT: [[ANYEXT:%[0-9]+]]:gprb(s64) = G_ANYEXT [[COPY3]](s32)
83+
; RV32I-NEXT: $x10 = COPY [[ANYEXT]](s64)
84+
; RV32I-NEXT: PseudoRET implicit $x10
85+
%3:_(s64) = COPY $x10
86+
%4:_(s32) = COPY $f10_f
87+
%5:_(s32) = COPY $f11_f
88+
%12:_(s64) = G_CONSTANT i64 1
89+
%11:_(s64) = G_AND %3, %12
90+
%10:_(s32) = G_SELECT %11(s64), %4(s32), %5
91+
%13:_(s64) = G_ANYEXT %10(s32)
92+
$x10 = COPY %13(s64)
93+
PseudoRET implicit $x10
94+
95+
...
96+
---
97+
name: fp_select_gpr_use_s64
98+
legalized: true
99+
tracksRegLiveness: true
100+
body: |
101+
bb.0.entry:
102+
liveins: $x10, $f10_d, $f11_d
103+
104+
; RV32I-LABEL: name: fp_select_gpr_use_s64
105+
; RV32I: liveins: $x10, $f10_d, $f11_d
106+
; RV32I-NEXT: {{ $}}
107+
; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
108+
; RV32I-NEXT: [[COPY1:%[0-9]+]]:fprb(s64) = COPY $f10_d
109+
; RV32I-NEXT: [[COPY2:%[0-9]+]]:fprb(s64) = COPY $f11_d
110+
; RV32I-NEXT: [[C:%[0-9]+]]:gprb(s64) = G_CONSTANT i64 1
111+
; RV32I-NEXT: [[AND:%[0-9]+]]:gprb(s64) = G_AND [[COPY]], [[C]]
112+
; RV32I-NEXT: [[SELECT:%[0-9]+]]:fprb(s64) = G_SELECT [[AND]](s64), [[COPY1]], [[COPY2]]
113+
; RV32I-NEXT: $x10 = COPY [[SELECT]](s64)
114+
; RV32I-NEXT: PseudoRET implicit $x10
115+
%3:_(s64) = COPY $x10
116+
%4:_(s64) = COPY $f10_d
117+
%5:_(s64) = COPY $f11_d
118+
%12:_(s64) = G_CONSTANT i64 1
119+
%11:_(s64) = G_AND %3, %12
120+
%10:_(s64) = G_SELECT %11(s64), %4, %5
121+
$x10 = COPY %10(s64)
122+
PseudoRET implicit $x10
123+
124+
...
125+
---
126+
name: fp_select_gpr_def_s32
127+
legalized: true
128+
tracksRegLiveness: true
129+
body: |
130+
bb.0.entry:
131+
liveins: $x10, $x11, $f10_f
132+
133+
; RV32I-LABEL: name: fp_select_gpr_def_s32
134+
; RV32I: liveins: $x10, $x11, $f10_f
135+
; RV32I-NEXT: {{ $}}
136+
; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
137+
; RV32I-NEXT: [[COPY1:%[0-9]+]]:fprb(s32) = COPY $f10_f
138+
; RV32I-NEXT: [[COPY2:%[0-9]+]]:gprb(s64) = COPY $x11
139+
; RV32I-NEXT: [[TRUNC:%[0-9]+]]:gprb(s32) = G_TRUNC [[COPY2]](s64)
140+
; RV32I-NEXT: [[C:%[0-9]+]]:gprb(s64) = G_CONSTANT i64 1
141+
; RV32I-NEXT: [[AND:%[0-9]+]]:gprb(s64) = G_AND [[COPY]], [[C]]
142+
; RV32I-NEXT: [[COPY3:%[0-9]+]]:fprb(s32) = COPY [[TRUNC]](s32)
143+
; RV32I-NEXT: [[SELECT:%[0-9]+]]:fprb(s32) = G_SELECT [[AND]](s64), [[COPY3]], [[COPY1]]
144+
; RV32I-NEXT: $f10_f = COPY [[SELECT]](s32)
145+
; RV32I-NEXT: PseudoRET implicit $f10_f
146+
%3:_(s64) = COPY $x10
147+
%4:_(s32) = COPY $f10_f
148+
%5:_(s64) = COPY $x11
149+
%6:_(s32) = G_TRUNC %5(s64)
150+
%12:_(s64) = G_CONSTANT i64 1
151+
%11:_(s64) = G_AND %3, %12
152+
%10:_(s32) = G_SELECT %11(s64), %6(s32), %4
153+
$f10_f = COPY %10(s32)
154+
PseudoRET implicit $f10_f
155+
156+
...
157+
---
158+
name: fp_select_gpr_def_s64
159+
legalized: true
160+
tracksRegLiveness: true
161+
body: |
162+
bb.0.entry:
163+
liveins: $x10, $x11, $f10_d
164+
165+
; RV32I-LABEL: name: fp_select_gpr_def_s64
166+
; RV32I: liveins: $x10, $x11, $f10_d
167+
; RV32I-NEXT: {{ $}}
168+
; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
169+
; RV32I-NEXT: [[COPY1:%[0-9]+]]:fprb(s64) = COPY $f10_d
170+
; RV32I-NEXT: [[COPY2:%[0-9]+]]:gprb(s64) = COPY $x11
171+
; RV32I-NEXT: [[C:%[0-9]+]]:gprb(s64) = G_CONSTANT i64 1
172+
; RV32I-NEXT: [[AND:%[0-9]+]]:gprb(s64) = G_AND [[COPY]], [[C]]
173+
; RV32I-NEXT: [[COPY3:%[0-9]+]]:fprb(s64) = COPY [[COPY2]](s64)
174+
; RV32I-NEXT: [[SELECT:%[0-9]+]]:fprb(s64) = G_SELECT [[AND]](s64), [[COPY1]], [[COPY3]]
175+
; RV32I-NEXT: $f10_d = COPY [[SELECT]](s64)
176+
; RV32I-NEXT: PseudoRET implicit $f10_d
177+
%3:_(s64) = COPY $x10
178+
%4:_(s64) = COPY $f10_d
179+
%5:_(s64) = COPY $x11
180+
%12:_(s64) = G_CONSTANT i64 1
181+
%11:_(s64) = G_AND %3, %12
182+
%10:_(s64) = G_SELECT %11(s64), %4, %5
183+
$f10_d = COPY %10(s64)
184+
PseudoRET implicit $f10_d
185+
186+
...
187+
---
188+
name: fp_select_only_fpr_use_s64
189+
legalized: true
190+
tracksRegLiveness: true
191+
body: |
192+
bb.0.entry:
193+
liveins: $x10, $x11, $x12
194+
195+
; RV32I-LABEL: name: fp_select_only_fpr_use_s64
196+
; RV32I: liveins: $x10, $x11, $x12
197+
; RV32I-NEXT: {{ $}}
198+
; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
199+
; RV32I-NEXT: [[COPY1:%[0-9]+]]:gprb(s64) = COPY $x11
200+
; RV32I-NEXT: [[COPY2:%[0-9]+]]:gprb(s64) = COPY $x12
201+
; RV32I-NEXT: [[C:%[0-9]+]]:gprb(s64) = G_CONSTANT i64 1
202+
; RV32I-NEXT: [[AND:%[0-9]+]]:gprb(s64) = G_AND [[COPY]], [[C]]
203+
; RV32I-NEXT: [[SELECT:%[0-9]+]]:gprb(s64) = G_SELECT [[AND]](s64), [[COPY1]], [[COPY2]]
204+
; RV32I-NEXT: $f10_d = COPY [[SELECT]](s64)
205+
; RV32I-NEXT: PseudoRET implicit $f10_d
206+
%3:_(s64) = COPY $x10
207+
%4:_(s64) = COPY $x11
208+
%5:_(s64) = COPY $x12
209+
%12:_(s64) = G_CONSTANT i64 1
210+
%11:_(s64) = G_AND %3, %12
211+
%10:_(s64) = G_SELECT %11(s64), %4, %5
212+
$f10_d = COPY %10(s64)
213+
PseudoRET implicit $f10_d
214+
215+
...
216+
---
217+
name: fp_select_only_one_fpr_def_s64
218+
legalized: true
219+
tracksRegLiveness: true
220+
body: |
221+
bb.0.entry:
222+
liveins: $x10, $x11, $f10_d
223+
224+
; RV32I-LABEL: name: fp_select_only_one_fpr_def_s64
225+
; RV32I: liveins: $x10, $x11, $f10_d
226+
; RV32I-NEXT: {{ $}}
227+
; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
228+
; RV32I-NEXT: [[COPY1:%[0-9]+]]:fprb(s64) = COPY $f10_d
229+
; RV32I-NEXT: [[COPY2:%[0-9]+]]:gprb(s64) = COPY $x11
230+
; RV32I-NEXT: [[C:%[0-9]+]]:gprb(s64) = G_CONSTANT i64 1
231+
; RV32I-NEXT: [[AND:%[0-9]+]]:gprb(s64) = G_AND [[COPY]], [[C]]
232+
; RV32I-NEXT: [[COPY3:%[0-9]+]]:gprb(s64) = COPY [[COPY1]](s64)
233+
; RV32I-NEXT: [[SELECT:%[0-9]+]]:gprb(s64) = G_SELECT [[AND]](s64), [[COPY3]], [[COPY2]]
234+
; RV32I-NEXT: $x10 = COPY [[SELECT]](s64)
235+
; RV32I-NEXT: PseudoRET implicit $x10
236+
%3:_(s64) = COPY $x10
237+
%4:_(s64) = COPY $f10_d
238+
%5:_(s64) = COPY $x11
239+
%12:_(s64) = G_CONSTANT i64 1
240+
%11:_(s64) = G_AND %3, %12
241+
%10:_(s64) = G_SELECT %11(s64), %4, %5
242+
$x10 = COPY %10(s64)
243+
PseudoRET implicit $x10
244+
245+
...

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