Skip to content

Commit fb46c3d

Browse files
committed
s/src/Src and deleted extra return
1 parent 185a4f5 commit fb46c3d

File tree

1 file changed

+3
-5
lines changed

1 file changed

+3
-5
lines changed

llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

Lines changed: 3 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -774,17 +774,15 @@ SDValue DAGTypeLegalizer::ScalarizeVecOp_BITCAST(SDNode *N) {
774774
SDValue DAGTypeLegalizer::ScalarizeVecOp_INSERT_SUBVECTOR(SDNode *N,
775775
unsigned OpNo) {
776776
// If the destination vector is unary, we can just return the source vector
777-
auto src = GetScalarizedVector(N->getOperand(1));
777+
auto Src = GetScalarizedVector(N->getOperand(1));
778778
if (OpNo == 0) {
779-
return src;
779+
return Src;
780780
}
781781

782782
auto dest = N->getOperand(0);
783783
auto idx = N->getOperand(2);
784784
return DAG.getNode(ISD::INSERT_VECTOR_ELT, SDLoc(N), N->getValueType(0), dest,
785-
src, idx);
786-
787-
return GetScalarizedVector(src);
785+
Src, idx);
788786
}
789787

790788
/// If the input is a vector that needs to be scalarized, it must be <1 x ty>.

0 commit comments

Comments
 (0)