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[InstCombine] Add pre-commit tests
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  • llvm/test/Transforms/InstCombine

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llvm/test/Transforms/InstCombine/fsh.ll

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@@ -1010,3 +1010,47 @@ define <2 x i32> @fshr_vec_zero_elem(<2 x i32> %x, <2 x i32> %y) {
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%fsh = call <2 x i32> @llvm.fshr.v2i32(<2 x i32> %x, <2 x i32> %y, <2 x i32> <i32 2, i32 0>)
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ret <2 x i32> %fsh
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}
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define i16 @fshl_i16_shl(i16 %x, i16 %y) {
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; CHECK-LABEL: @fshl_i16_shl(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[RES:%.*]] = call i16 @llvm.fshl.i16(i16 [[X:%.*]], i16 0, i16 [[Y:%.*]])
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; CHECK-NEXT: ret i16 [[RES]]
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;
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entry:
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%res = call i16 @llvm.fshl.i16(i16 %x, i16 0, i16 %y)
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ret i16 %res
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}
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define i32 @fshl_i32_shl(i32 %x, i32 %y) {
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; CHECK-LABEL: @fshl_i32_shl(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[RES:%.*]] = call i32 @llvm.fshl.i32(i32 [[X:%.*]], i32 0, i32 [[Y:%.*]])
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; CHECK-NEXT: ret i32 [[RES]]
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;
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entry:
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%res = call i32 @llvm.fshl.i32(i32 %x, i32 0, i32 %y)
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ret i32 %res
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}
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define <2 x i16> @fshl_vi16_shl(<2 x i16> %x, <2 x i16> %y) {
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; CHECK-LABEL: @fshl_vi16_shl(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[RES:%.*]] = call <2 x i16> @llvm.fshl.v2i16(<2 x i16> [[X:%.*]], <2 x i16> zeroinitializer, <2 x i16> [[Y:%.*]])
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; CHECK-NEXT: ret <2 x i16> [[RES]]
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;
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entry:
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%res = call <2 x i16> @llvm.fshl.v2i16(<2 x i16> %x, <2 x i16> <i16 0, i16 0>, <2 x i16> %y)
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ret <2 x i16> %res
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}
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define <2 x i31> @fshl_vi31_shl(<2 x i31> %x, <2 x i31> %y) {
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; CHECK-LABEL: @fshl_vi31_shl(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[RES:%.*]] = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> [[X:%.*]], <2 x i31> zeroinitializer, <2 x i31> [[Y:%.*]])
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; CHECK-NEXT: ret <2 x i31> [[RES]]
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;
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entry:
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%res = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %x, <2 x i31> <i31 0, i31 0>, <2 x i31> %y)
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ret <2 x i31> %res
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}

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