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Add and adjust saturating tests. NFC
This adds some extra testing to the existing [su][add/sub]_sat X86 and AArch64 tests and adds equivalent tests for ARM. llvm-svn: 374169
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12 files changed

+1792
-30
lines changed

12 files changed

+1792
-30
lines changed

‎llvm/test/CodeGen/AArch64/sadd_sat.ll

Lines changed: 38 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,10 +1,12 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
22
; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s
33

4-
declare i4 @llvm.sadd.sat.i4 (i4, i4)
5-
declare i32 @llvm.sadd.sat.i32 (i32, i32)
6-
declare i64 @llvm.sadd.sat.i64 (i64, i64)
7-
declare <4 x i32> @llvm.sadd.sat.v4i32(<4 x i32>, <4 x i32>)
4+
declare i4 @llvm.sadd.sat.i4(i4, i4)
5+
declare i8 @llvm.sadd.sat.i8(i8, i8)
6+
declare i16 @llvm.sadd.sat.i16(i16, i16)
7+
declare i32 @llvm.sadd.sat.i32(i32, i32)
8+
declare i64 @llvm.sadd.sat.i64(i64, i64)
9+
declare <4 x i32> @llvm.sadd.sat.v4i32(<4 x i32>, <4 x i32>)
810

911
define i32 @func(i32 %x, i32 %y) nounwind {
1012
; CHECK-LABEL: func:
@@ -34,6 +36,38 @@ define i64 @func2(i64 %x, i64 %y) nounwind {
3436
ret i64 %tmp;
3537
}
3638

39+
define i16 @func16(i16 %x, i16 %y) nounwind {
40+
; CHECK-LABEL: func16:
41+
; CHECK: // %bb.0:
42+
; CHECK-NEXT: lsl w8, w0, #16
43+
; CHECK-NEXT: adds w10, w8, w1, lsl #16
44+
; CHECK-NEXT: mov w9, #2147483647
45+
; CHECK-NEXT: cmp w10, #0 // =0
46+
; CHECK-NEXT: cinv w9, w9, ge
47+
; CHECK-NEXT: adds w8, w8, w1, lsl #16
48+
; CHECK-NEXT: csel w8, w9, w8, vs
49+
; CHECK-NEXT: asr w0, w8, #16
50+
; CHECK-NEXT: ret
51+
%tmp = call i16 @llvm.sadd.sat.i16(i16 %x, i16 %y);
52+
ret i16 %tmp;
53+
}
54+
55+
define i8 @func8(i8 %x, i8 %y) nounwind {
56+
; CHECK-LABEL: func8:
57+
; CHECK: // %bb.0:
58+
; CHECK-NEXT: lsl w8, w0, #24
59+
; CHECK-NEXT: adds w10, w8, w1, lsl #24
60+
; CHECK-NEXT: mov w9, #2147483647
61+
; CHECK-NEXT: cmp w10, #0 // =0
62+
; CHECK-NEXT: cinv w9, w9, ge
63+
; CHECK-NEXT: adds w8, w8, w1, lsl #24
64+
; CHECK-NEXT: csel w8, w9, w8, vs
65+
; CHECK-NEXT: asr w0, w8, #24
66+
; CHECK-NEXT: ret
67+
%tmp = call i8 @llvm.sadd.sat.i8(i8 %x, i8 %y);
68+
ret i8 %tmp;
69+
}
70+
3771
define i4 @func3(i4 %x, i4 %y) nounwind {
3872
; CHECK-LABEL: func3:
3973
; CHECK: // %bb.0:

‎llvm/test/CodeGen/AArch64/ssub_sat.ll

Lines changed: 38 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,10 +1,12 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
22
; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s
33

4-
declare i4 @llvm.ssub.sat.i4 (i4, i4)
5-
declare i32 @llvm.ssub.sat.i32 (i32, i32)
6-
declare i64 @llvm.ssub.sat.i64 (i64, i64)
7-
declare <4 x i32> @llvm.ssub.sat.v4i32(<4 x i32>, <4 x i32>)
4+
declare i4 @llvm.ssub.sat.i4(i4, i4)
5+
declare i8 @llvm.ssub.sat.i8(i8, i8)
6+
declare i16 @llvm.ssub.sat.i16(i16, i16)
7+
declare i32 @llvm.ssub.sat.i32(i32, i32)
8+
declare i64 @llvm.ssub.sat.i64(i64, i64)
9+
declare <4 x i32> @llvm.ssub.sat.v4i32(<4 x i32>, <4 x i32>)
810

911
define i32 @func(i32 %x, i32 %y) nounwind {
1012
; CHECK-LABEL: func:
@@ -34,6 +36,38 @@ define i64 @func2(i64 %x, i64 %y) nounwind {
3436
ret i64 %tmp;
3537
}
3638

39+
define i16 @func16(i16 %x, i16 %y) nounwind {
40+
; CHECK-LABEL: func16:
41+
; CHECK: // %bb.0:
42+
; CHECK-NEXT: lsl w8, w0, #16
43+
; CHECK-NEXT: subs w10, w8, w1, lsl #16
44+
; CHECK-NEXT: mov w9, #2147483647
45+
; CHECK-NEXT: cmp w10, #0 // =0
46+
; CHECK-NEXT: cinv w9, w9, ge
47+
; CHECK-NEXT: subs w8, w8, w1, lsl #16
48+
; CHECK-NEXT: csel w8, w9, w8, vs
49+
; CHECK-NEXT: asr w0, w8, #16
50+
; CHECK-NEXT: ret
51+
%tmp = call i16 @llvm.ssub.sat.i16(i16 %x, i16 %y);
52+
ret i16 %tmp;
53+
}
54+
55+
define i8 @func8(i8 %x, i8 %y) nounwind {
56+
; CHECK-LABEL: func8:
57+
; CHECK: // %bb.0:
58+
; CHECK-NEXT: lsl w8, w0, #24
59+
; CHECK-NEXT: subs w10, w8, w1, lsl #24
60+
; CHECK-NEXT: mov w9, #2147483647
61+
; CHECK-NEXT: cmp w10, #0 // =0
62+
; CHECK-NEXT: cinv w9, w9, ge
63+
; CHECK-NEXT: subs w8, w8, w1, lsl #24
64+
; CHECK-NEXT: csel w8, w9, w8, vs
65+
; CHECK-NEXT: asr w0, w8, #24
66+
; CHECK-NEXT: ret
67+
%tmp = call i8 @llvm.ssub.sat.i8(i8 %x, i8 %y);
68+
ret i8 %tmp;
69+
}
70+
3771
define i4 @func3(i4 %x, i4 %y) nounwind {
3872
; CHECK-LABEL: func3:
3973
; CHECK: // %bb.0:

‎llvm/test/CodeGen/AArch64/uadd_sat.ll

Lines changed: 29 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,11 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
22
; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s
33

4-
declare i4 @llvm.uadd.sat.i4 (i4, i4)
5-
declare i32 @llvm.uadd.sat.i32 (i32, i32)
6-
declare i64 @llvm.uadd.sat.i64 (i64, i64)
4+
declare i4 @llvm.uadd.sat.i4(i4, i4)
5+
declare i8 @llvm.uadd.sat.i8(i8, i8)
6+
declare i16 @llvm.uadd.sat.i16(i16, i16)
7+
declare i32 @llvm.uadd.sat.i32(i32, i32)
8+
declare i64 @llvm.uadd.sat.i64(i64, i64)
79

810
define i32 @func(i32 %x, i32 %y) nounwind {
911
; CHECK-LABEL: func:
@@ -25,6 +27,30 @@ define i64 @func2(i64 %x, i64 %y) nounwind {
2527
ret i64 %tmp;
2628
}
2729

30+
define i16 @func16(i16 %x, i16 %y) nounwind {
31+
; CHECK-LABEL: func16:
32+
; CHECK: // %bb.0:
33+
; CHECK-NEXT: lsl w8, w0, #16
34+
; CHECK-NEXT: adds w8, w8, w1, lsl #16
35+
; CHECK-NEXT: csinv w8, w8, wzr, lo
36+
; CHECK-NEXT: lsr w0, w8, #16
37+
; CHECK-NEXT: ret
38+
%tmp = call i16 @llvm.uadd.sat.i16(i16 %x, i16 %y);
39+
ret i16 %tmp;
40+
}
41+
42+
define i8 @func8(i8 %x, i8 %y) nounwind {
43+
; CHECK-LABEL: func8:
44+
; CHECK: // %bb.0:
45+
; CHECK-NEXT: lsl w8, w0, #24
46+
; CHECK-NEXT: adds w8, w8, w1, lsl #24
47+
; CHECK-NEXT: csinv w8, w8, wzr, lo
48+
; CHECK-NEXT: lsr w0, w8, #24
49+
; CHECK-NEXT: ret
50+
%tmp = call i8 @llvm.uadd.sat.i8(i8 %x, i8 %y);
51+
ret i8 %tmp;
52+
}
53+
2854
define i4 @func3(i4 %x, i4 %y) nounwind {
2955
; CHECK-LABEL: func3:
3056
; CHECK: // %bb.0:

‎llvm/test/CodeGen/AArch64/usub_sat.ll

Lines changed: 29 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,11 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
22
; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s
33

4-
declare i4 @llvm.usub.sat.i4 (i4, i4)
5-
declare i32 @llvm.usub.sat.i32 (i32, i32)
6-
declare i64 @llvm.usub.sat.i64 (i64, i64)
4+
declare i4 @llvm.usub.sat.i4(i4, i4)
5+
declare i8 @llvm.usub.sat.i8(i8, i8)
6+
declare i16 @llvm.usub.sat.i16(i16, i16)
7+
declare i32 @llvm.usub.sat.i32(i32, i32)
8+
declare i64 @llvm.usub.sat.i64(i64, i64)
79

810
define i32 @func(i32 %x, i32 %y) nounwind {
911
; CHECK-LABEL: func:
@@ -25,6 +27,30 @@ define i64 @func2(i64 %x, i64 %y) nounwind {
2527
ret i64 %tmp;
2628
}
2729

30+
define i16 @func16(i16 %x, i16 %y) nounwind {
31+
; CHECK-LABEL: func16:
32+
; CHECK: // %bb.0:
33+
; CHECK-NEXT: lsl w8, w0, #16
34+
; CHECK-NEXT: subs w8, w8, w1, lsl #16
35+
; CHECK-NEXT: csel w8, wzr, w8, lo
36+
; CHECK-NEXT: lsr w0, w8, #16
37+
; CHECK-NEXT: ret
38+
%tmp = call i16 @llvm.usub.sat.i16(i16 %x, i16 %y);
39+
ret i16 %tmp;
40+
}
41+
42+
define i8 @func8(i8 %x, i8 %y) nounwind {
43+
; CHECK-LABEL: func8:
44+
; CHECK: // %bb.0:
45+
; CHECK-NEXT: lsl w8, w0, #24
46+
; CHECK-NEXT: subs w8, w8, w1, lsl #24
47+
; CHECK-NEXT: csel w8, wzr, w8, lo
48+
; CHECK-NEXT: lsr w0, w8, #24
49+
; CHECK-NEXT: ret
50+
%tmp = call i8 @llvm.usub.sat.i8(i8 %x, i8 %y);
51+
ret i8 %tmp;
52+
}
53+
2854
define i4 @func3(i4 %x, i4 %y) nounwind {
2955
; CHECK-LABEL: func3:
3056
; CHECK: // %bb.0:

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