@@ -86,22 +86,23 @@ bool RemoveLoadsIntoFakeUses::runOnMachineFunction(MachineFunction &MF) {
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const TargetInstrInfo *TII = ST.getInstrInfo ();
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const TargetRegisterInfo *TRI = ST.getRegisterInfo ();
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- SmallDenseMap<Register , SmallVector<MachineInstr *>> RegFakeUses;
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+ SmallDenseMap<MCRegUnit , SmallVector<MachineInstr *>> RegFakeUses;
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LivePhysRegs.init (*TRI);
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SmallVector<MachineInstr *, 16 > Statepoints;
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for (MachineBasicBlock *MBB : post_order (&MF)) {
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+ RegFakeUses.clear ();
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LivePhysRegs.addLiveOuts (*MBB);
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for (MachineInstr &MI : make_early_inc_range (reverse (*MBB))) {
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if (MI.isFakeUse ()) {
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+ if (MI.getNumOperands () == 0 || !MI.getOperand (0 ).isReg ())
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+ continue ;
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const MachineOperand &FakeUseOp = MI.getOperand (0 );
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- // Track the Fake Uses that use this register so that we can delete
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- // them if we delete the corresponding load.
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- if (FakeUseOp.isReg ()) {
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- assert (FakeUseOp.getReg ().isPhysical () &&
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- " VReg seen in function with NoVRegs set?" );
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- RegFakeUses[FakeUseOp.getReg ()].push_back (&MI);
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- }
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+ // Track the Fake Uses that use these register units so that we can
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+ // delete them if we delete the corresponding load.
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+ if (FakeUseOp.isReg ())
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+ for (MCRegUnit Unit : TRI->regunits (FakeUseOp.getReg ()))
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+ RegFakeUses[Unit].push_back (&MI);
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// Do not record FAKE_USE uses in LivePhysRegs so that we can recognize
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// otherwise-unused loads.
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continue ;
@@ -111,7 +112,6 @@ bool RemoveLoadsIntoFakeUses::runOnMachineFunction(MachineFunction &MF) {
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// reload of a spilled register.
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if (MI.getRestoreSize (TII)) {
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Register Reg = MI.getOperand (0 ).getReg ();
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- assert (Reg.isPhysical () && " VReg seen in function with NoVRegs set?" );
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// Don't delete live physreg defs, or any reserved register defs.
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if (!LivePhysRegs.available (Reg) || MRI->isReserved (Reg))
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continue ;
@@ -122,27 +122,28 @@ bool RemoveLoadsIntoFakeUses::runOnMachineFunction(MachineFunction &MF) {
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// used by any fake uses, it should still be safe to delete but we
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// choose to ignore it so that this pass has no side effects unrelated
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// to fake uses.
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- bool HasFakeUse = false ;
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- for (MCPhysReg SubReg : TRI->subregs_inclusive (Reg)) {
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- if (!RegFakeUses.contains (SubReg ))
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+ SmallDenseSet<MachineInstr *> FakeUsesToDelete ;
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+ for (MCRegUnit Unit : TRI->regunits (Reg)) {
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+ if (!RegFakeUses.contains (Unit ))
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continue ;
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- HasFakeUse = true ;
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- for (MachineInstr *FakeUse : RegFakeUses[SubReg]) {
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- LLVM_DEBUG (dbgs ()
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- << " RemoveLoadsIntoFakeUses: DELETING: " << *FakeUse);
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- FakeUse->eraseFromParent ();
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- }
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- NumFakeUsesDeleted += RegFakeUses[SubReg].size ();
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- RegFakeUses[SubReg].clear ();
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+ for (MachineInstr *FakeUse : RegFakeUses[Unit])
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+ FakeUsesToDelete.insert (FakeUse);
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+ RegFakeUses.erase (Unit);
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}
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- if (HasFakeUse ) {
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+ if (!FakeUsesToDelete. empty () ) {
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LLVM_DEBUG (dbgs () << " RemoveLoadsIntoFakeUses: DELETING: " << MI);
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// Since this load only exists to restore a spilled register and we
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// haven't, run LiveDebugValues yet, there shouldn't be any DBG_VALUEs
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// for this load; otherwise, deleting this would be incorrect.
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MI.eraseFromParent ();
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AnyChanges = true ;
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++NumLoadsDeleted;
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+ for (MachineInstr *FakeUse : FakeUsesToDelete) {
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+ LLVM_DEBUG (dbgs ()
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+ << " RemoveLoadsIntoFakeUses: DELETING: " << *FakeUse);
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+ FakeUse->eraseFromParent ();
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+ }
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+ NumFakeUsesDeleted += FakeUsesToDelete.size ();
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}
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continue ;
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}
@@ -154,13 +155,11 @@ bool RemoveLoadsIntoFakeUses::runOnMachineFunction(MachineFunction &MF) {
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for (const MachineOperand &MO : MI.operands ()) {
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if (MO.isReg () && MO.isDef ()) {
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Register Reg = MO.getReg ();
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- assert (Reg.isPhysical () &&
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- " VReg seen in function with NoVRegs set?" );
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// We clear RegFakeUses for this register and all subregisters,
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// because any such FAKE_USE encountered prior applies only to this
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// instruction.
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- for (MCPhysReg SubReg : TRI->subregs_inclusive (Reg))
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- RegFakeUses.erase (SubReg );
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+ for (MCRegUnit Unit : TRI->regunits (Reg))
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+ RegFakeUses.erase (Unit );
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}
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}
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}
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