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Remove assertions, handle 0-op FAKE_USES, use RegUnits
1 parent 3ce74d6 commit fd2c94e

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2 files changed

+25
-26
lines changed

2 files changed

+25
-26
lines changed

llvm/lib/CodeGen/RemoveLoadsIntoFakeUses.cpp

Lines changed: 24 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -86,22 +86,23 @@ bool RemoveLoadsIntoFakeUses::runOnMachineFunction(MachineFunction &MF) {
8686
const TargetInstrInfo *TII = ST.getInstrInfo();
8787
const TargetRegisterInfo *TRI = ST.getRegisterInfo();
8888

89-
SmallDenseMap<Register, SmallVector<MachineInstr *>> RegFakeUses;
89+
SmallDenseMap<MCRegUnit, SmallVector<MachineInstr *>> RegFakeUses;
9090
LivePhysRegs.init(*TRI);
9191
SmallVector<MachineInstr *, 16> Statepoints;
9292
for (MachineBasicBlock *MBB : post_order(&MF)) {
93+
RegFakeUses.clear();
9394
LivePhysRegs.addLiveOuts(*MBB);
9495

9596
for (MachineInstr &MI : make_early_inc_range(reverse(*MBB))) {
9697
if (MI.isFakeUse()) {
98+
if (MI.getNumOperands() == 0 || !MI.getOperand(0).isReg())
99+
continue;
97100
const MachineOperand &FakeUseOp = MI.getOperand(0);
98-
// Track the Fake Uses that use this register so that we can delete
99-
// them if we delete the corresponding load.
100-
if (FakeUseOp.isReg()) {
101-
assert(FakeUseOp.getReg().isPhysical() &&
102-
"VReg seen in function with NoVRegs set?");
103-
RegFakeUses[FakeUseOp.getReg()].push_back(&MI);
104-
}
101+
// Track the Fake Uses that use these register units so that we can
102+
// delete them if we delete the corresponding load.
103+
if (FakeUseOp.isReg())
104+
for (MCRegUnit Unit : TRI->regunits(FakeUseOp.getReg()))
105+
RegFakeUses[Unit].push_back(&MI);
105106
// Do not record FAKE_USE uses in LivePhysRegs so that we can recognize
106107
// otherwise-unused loads.
107108
continue;
@@ -111,7 +112,6 @@ bool RemoveLoadsIntoFakeUses::runOnMachineFunction(MachineFunction &MF) {
111112
// reload of a spilled register.
112113
if (MI.getRestoreSize(TII)) {
113114
Register Reg = MI.getOperand(0).getReg();
114-
assert(Reg.isPhysical() && "VReg seen in function with NoVRegs set?");
115115
// Don't delete live physreg defs, or any reserved register defs.
116116
if (!LivePhysRegs.available(Reg) || MRI->isReserved(Reg))
117117
continue;
@@ -122,27 +122,28 @@ bool RemoveLoadsIntoFakeUses::runOnMachineFunction(MachineFunction &MF) {
122122
// used by any fake uses, it should still be safe to delete but we
123123
// choose to ignore it so that this pass has no side effects unrelated
124124
// to fake uses.
125-
bool HasFakeUse = false;
126-
for (MCPhysReg SubReg : TRI->subregs_inclusive(Reg)) {
127-
if (!RegFakeUses.contains(SubReg))
125+
SmallDenseSet<MachineInstr *> FakeUsesToDelete;
126+
for (MCRegUnit Unit : TRI->regunits(Reg)) {
127+
if (!RegFakeUses.contains(Unit))
128128
continue;
129-
HasFakeUse = true;
130-
for (MachineInstr *FakeUse : RegFakeUses[SubReg]) {
131-
LLVM_DEBUG(dbgs()
132-
<< "RemoveLoadsIntoFakeUses: DELETING: " << *FakeUse);
133-
FakeUse->eraseFromParent();
134-
}
135-
NumFakeUsesDeleted += RegFakeUses[SubReg].size();
136-
RegFakeUses[SubReg].clear();
129+
for (MachineInstr *FakeUse : RegFakeUses[Unit])
130+
FakeUsesToDelete.insert(FakeUse);
131+
RegFakeUses.erase(Unit);
137132
}
138-
if (HasFakeUse) {
133+
if (!FakeUsesToDelete.empty()) {
139134
LLVM_DEBUG(dbgs() << "RemoveLoadsIntoFakeUses: DELETING: " << MI);
140135
// Since this load only exists to restore a spilled register and we
141136
// haven't, run LiveDebugValues yet, there shouldn't be any DBG_VALUEs
142137
// for this load; otherwise, deleting this would be incorrect.
143138
MI.eraseFromParent();
144139
AnyChanges = true;
145140
++NumLoadsDeleted;
141+
for (MachineInstr *FakeUse : FakeUsesToDelete) {
142+
LLVM_DEBUG(dbgs()
143+
<< "RemoveLoadsIntoFakeUses: DELETING: " << *FakeUse);
144+
FakeUse->eraseFromParent();
145+
}
146+
NumFakeUsesDeleted += FakeUsesToDelete.size();
146147
}
147148
continue;
148149
}
@@ -154,13 +155,11 @@ bool RemoveLoadsIntoFakeUses::runOnMachineFunction(MachineFunction &MF) {
154155
for (const MachineOperand &MO : MI.operands()) {
155156
if (MO.isReg() && MO.isDef()) {
156157
Register Reg = MO.getReg();
157-
assert(Reg.isPhysical() &&
158-
"VReg seen in function with NoVRegs set?");
159158
// We clear RegFakeUses for this register and all subregisters,
160159
// because any such FAKE_USE encountered prior applies only to this
161160
// instruction.
162-
for (MCPhysReg SubReg : TRI->subregs_inclusive(Reg))
163-
RegFakeUses.erase(SubReg);
161+
for (MCRegUnit Unit : TRI->regunits(Reg))
162+
RegFakeUses.erase(Unit);
164163
}
165164
}
166165
}

llvm/test/CodeGen/X86/fake-use-remove-loads.mir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8,8 +8,8 @@
88
## correctly handle situations where FAKE_USE has additional `killed` operands
99
## added by other passes.
1010

11-
# CHECK: DELETING: FAKE_USE renamable $eax
1211
# CHECK: DELETING: renamable $rax = MOV64rm $rbp
12+
# CHECK: DELETING: FAKE_USE renamable $eax
1313

1414
## Also verify that the store to the stack slot still exists.
1515

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