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[AMDGPU] Require aligned VGPRs for gfx1250 (#145561)
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2 files changed

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‎llvm/lib/Target/AMDGPU/GCNSubtarget.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1290,7 +1290,7 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
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bool hasVALUReadSGPRHazard() const { return getGeneration() == GFX12; }
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/// Return if operations acting on VGPR tuples require even alignment.
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bool needsAlignedVGPRs() const { return GFX90AInsts; }
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bool needsAlignedVGPRs() const { return GFX90AInsts || GFX1250Insts; }
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/// Return true if the target has the S_PACK_HL_B32_B16 instruction.
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bool hasSPackHL() const { return GFX11Insts; }

‎llvm/test/CodeGen/AMDGPU/alloc-aligned-tuples-gfx1250.mir

Lines changed: 148 additions & 0 deletions
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# RUN: llc -mtriple=amdgcn -mcpu=gfx1250 -start-before=greedy,0 -stop-after=virtregrewriter,2 -verify-machineinstrs -o - %s | FileCheck --check-prefixes=GCN,GFX1250 %s
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# Using the unaligned vector tuples are OK as long as they aren't used
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# in a real instruction.
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---
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# GCN-LABEL: name: alloc_vgpr_64
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# GFX1250: $vgpr4_vgpr5 = GLOBAL_LOAD
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name: alloc_vgpr_64
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tracksRegLiveness: true
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liveins:
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- { reg: '$vgpr0_vgpr1' }
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- { reg: '$vgpr2' }
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2
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%0:vreg_64_align2 = COPY $vgpr0_vgpr1
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%1:vgpr_32 = COPY $vgpr2
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%2:vreg_64_align2 = GLOBAL_LOAD_DWORDX2 %0, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX2 %0, %2, 0, 0, implicit $exec
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GLOBAL_STORE_DWORD %0, %1, 0, 0, implicit $exec
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...
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---
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# GCN-LABEL: name: alloc_vgpr_96
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# GFX1250: $vgpr4_vgpr5_vgpr6 = GLOBAL_LOAD
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name: alloc_vgpr_96
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tracksRegLiveness: true
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liveins:
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- { reg: '$vgpr0_vgpr1' }
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- { reg: '$vgpr2' }
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2
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%0:vreg_64_align2 = COPY $vgpr0_vgpr1
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%1:vgpr_32 = COPY $vgpr2
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%2:vreg_96_align2 = GLOBAL_LOAD_DWORDX3 %0, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX3 %0, %2, 0, 0, implicit $exec
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GLOBAL_STORE_DWORD %0, %1, 0, 0, implicit $exec
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...
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---
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# GCN-LABEL: name: alloc_vgpr_128
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# GFX1250: $vgpr4_vgpr5_vgpr6_vgpr7 = GLOBAL_LOAD
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name: alloc_vgpr_128
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tracksRegLiveness: true
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liveins:
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- { reg: '$vgpr0_vgpr1' }
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- { reg: '$vgpr2' }
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2
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%0:vreg_64_align2 = COPY $vgpr0_vgpr1
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%1:vgpr_32 = COPY $vgpr2
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%2:vreg_128_align2 = GLOBAL_LOAD_DWORDX4 %0, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX4 %0, %2, 0, 0, implicit $exec
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GLOBAL_STORE_DWORD %0, %1, 0, 0, implicit $exec
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...
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---
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# GCN-LABEL: name: alloc_vgpr_160
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# GFX1250: $vgpr4_vgpr5_vgpr6_vgpr7_vgpr8 = IMAGE_LOAD
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name: alloc_vgpr_160
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tracksRegLiveness: true
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liveins:
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- { reg: '$vgpr0_vgpr1' }
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- { reg: '$vgpr2' }
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2
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%0:vreg_64_align2 = COPY $vgpr0_vgpr1
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%1:vgpr_32 = COPY $vgpr2
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%2:vreg_160_align2 = IMAGE_LOAD_V5_V1 %0.sub0, undef %3:sgpr_256, 0, 0, 0, 0, 0, 1, 0, 0, implicit $exec :: (dereferenceable load (s32), addrspace 4)
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GLOBAL_STORE_DWORDX4 %0, %2.sub0_sub1_sub2_sub3, 0, 0, implicit $exec
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GLOBAL_STORE_DWORD %0, %1, 0, 0, implicit $exec
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...
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---
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# GCN-LABEL: name: alloc_vgpr_256
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# GFX1250: $vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11 = COPY
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name: alloc_vgpr_256
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tracksRegLiveness: true
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liveins:
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- { reg: '$vgpr0_vgpr1' }
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- { reg: '$vgpr2' }
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2
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%0:vreg_64_align2 = COPY $vgpr0_vgpr1
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%1:vgpr_32 = COPY $vgpr2
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%3:sgpr_256 = IMPLICIT_DEF
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%2:vreg_256_align2 = COPY %3:sgpr_256
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%4:vreg_128_align2 = IMAGE_SAMPLE_C_CL_O_V4_V8 %2, %3:sgpr_256, undef %5:sgpr_128, 0, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s32), addrspace 4)
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GLOBAL_STORE_DWORDX4 %0, %2.sub0_sub1_sub2_sub3, 0, 0, implicit $exec
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GLOBAL_STORE_DWORD %0, %1, 0, 0, implicit $exec
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...
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---
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# GCN-LABEL: name: alloc_vgpr_512
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# GFX1250: $vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19 = IMPLICIT_DEF
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name: alloc_vgpr_512
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tracksRegLiveness: true
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liveins:
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- { reg: '$vgpr0_vgpr1' }
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- { reg: '$vgpr2' }
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2
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%0:vreg_64_align2 = COPY $vgpr0_vgpr1
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%1:vgpr_32 = COPY $vgpr2
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%2:vreg_512_align2 = IMPLICIT_DEF
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GLOBAL_STORE_DWORDX4 %0, %2.sub0_sub1_sub2_sub3, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX4 %0, %2.sub4_sub5_sub6_sub7, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX4 %0, %2.sub8_sub9_sub10_sub11, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX4 %0, %2.sub12_sub13_sub14_sub15, 0, 0, implicit $exec
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GLOBAL_STORE_DWORD %0, %1, 0, 0, implicit $exec
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...
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---
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# GCN-LABEL: name: alloc_vgpr_1024
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# GFX1250: $vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32_vgpr33_vgpr34_vgpr35 = IMPLICIT_DEF
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name: alloc_vgpr_1024
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tracksRegLiveness: true
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liveins:
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- { reg: '$vgpr0_vgpr1' }
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- { reg: '$vgpr2' }
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2
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%0:vreg_64_align2 = COPY $vgpr0_vgpr1
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%1:vgpr_32 = COPY $vgpr2
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%2:vreg_1024_align2 = IMPLICIT_DEF
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GLOBAL_STORE_DWORDX4 %0, %2.sub0_sub1_sub2_sub3, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX4 %0, %2.sub4_sub5_sub6_sub7, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX4 %0, %2.sub8_sub9_sub10_sub11, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX4 %0, %2.sub12_sub13_sub14_sub15, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX4 %0, %2.sub16_sub17_sub18_sub19, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX4 %0, %2.sub20_sub21_sub22_sub23, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX4 %0, %2.sub24_sub25_sub26_sub27, 0, 0, implicit $exec
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GLOBAL_STORE_DWORDX4 %0, %2.sub28_sub29_sub30_sub31, 0, 0, implicit $exec
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GLOBAL_STORE_DWORD %0, %1, 0, 0, implicit $exec
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...

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