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[Tests] Regenerate test checks (NFC)
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-35
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4 files changed

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-35
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‎llvm/test/Transforms/JumpThreading/pr22086.ll

Lines changed: 7 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,13 +1,15 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
12
; RUN: opt -S -passes=jump-threading < %s | FileCheck %s
23

34

4-
; CHECK-LABEL: @f(
5-
; CHECK-LABEL: entry:
6-
; CHECK-NEXT: br label %[[loop:.*]]
7-
; CHECK: [[loop]]:
8-
; CHECK-NEXT: br label %[[loop]]
95

106
define void @f() {
7+
; CHECK-LABEL: define void @f() {
8+
; CHECK-NEXT: [[ENTRY:.*:]]
9+
; CHECK-NEXT: br label %[[LOR_RHS:.*]]
10+
; CHECK: [[LOR_RHS]]:
11+
; CHECK-NEXT: br label %[[LOR_RHS]]
12+
;
1113
entry:
1214
br label %for.cond1
1315

‎llvm/test/Transforms/LoopUnroll/unroll-cleanup.ll

Lines changed: 104 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,4 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
12
; PR23524
23
; The test is to check redundency produced by loop unroll pass
34
; should be cleaned up by later pass.
@@ -10,8 +11,6 @@
1011
; should be merged to:
1112
; %dec18.1 = add nsw i32 %dec18.in, -2
1213
;
13-
; CHECK-LABEL: @_Z3fn1v(
14-
; CHECK: %dec18.1 = add nsw i32 %dec18.in, -2
1514

1615
; ModuleID = '<stdin>'
1716
target triple = "x86_64-unknown-linux-gnu"
@@ -21,9 +20,99 @@ target triple = "x86_64-unknown-linux-gnu"
2120

2221
; Function Attrs: nounwind uwtable
2322
define void @_Z3fn1v() #0 {
23+
; CHECK-LABEL: define void @_Z3fn1v(
24+
; CHECK-SAME: ) local_unnamed_addr #[[ATTR0:[0-9]+]] {
25+
; CHECK-NEXT: [[ENTRY:.*]]:
26+
; CHECK-NEXT: [[TMP:%.*]] = load i32, ptr @b, align 4
27+
; CHECK-NEXT: [[TOBOOL20:%.*]] = icmp eq i32 [[TMP]], 0
28+
; CHECK-NEXT: br i1 [[TOBOOL20]], label %[[FOR_END6:.*]], label %[[FOR_BODY:.*]]
29+
; CHECK: [[FOR_COND_LOOPEXIT_LOOPEXIT:.*]]:
30+
; CHECK-NEXT: [[ADD_PTR_LCSSA:%.*]] = phi ptr [ [[ADD_PTR_LCSSA_UNR:%.*]], %[[FOR_BODY3_PROL_LOOPEXIT:.*]] ], [ [[ADD_PTR_1:%.*]], %[[FOR_INC_1:.*]] ]
31+
; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[A_021:%.*]], i64 1
32+
; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[SCEVGEP]], i64 [[TMP1:%.*]]
33+
; CHECK-NEXT: [[TMP1_PRE:%.*]] = load i32, ptr @b, align 4
34+
; CHECK-NEXT: br label %[[FOR_COND_LOOPEXIT:.*]]
35+
; CHECK: [[FOR_COND_LOOPEXIT]]:
36+
; CHECK-NEXT: [[T1:%.*]] = phi i32 [ [[T12:%.*]], %[[FOR_BODY]] ], [ [[TMP1_PRE]], %[[FOR_COND_LOOPEXIT_LOOPEXIT]] ]
37+
; CHECK-NEXT: [[R_1_LCSSA:%.*]] = phi ptr [ [[R_022:%.*]], %[[FOR_BODY]] ], [ [[ADD_PTR_LCSSA]], %[[FOR_COND_LOOPEXIT_LOOPEXIT]] ]
38+
; CHECK-NEXT: [[A_1_LCSSA:%.*]] = phi ptr [ [[A_021]], %[[FOR_BODY]] ], [ [[SCEVGEP1]], %[[FOR_COND_LOOPEXIT_LOOPEXIT]] ]
39+
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[T1]], 0
40+
; CHECK-NEXT: br i1 [[TOBOOL]], label %[[FOR_END6]], label %[[FOR_BODY]]
41+
; CHECK: [[FOR_BODY]]:
42+
; CHECK-NEXT: [[T12]] = phi i32 [ [[T1]], %[[FOR_COND_LOOPEXIT]] ], [ [[TMP]], %[[ENTRY]] ]
43+
; CHECK-NEXT: [[R_022]] = phi ptr [ [[R_1_LCSSA]], %[[FOR_COND_LOOPEXIT]] ], [ undef, %[[ENTRY]] ]
44+
; CHECK-NEXT: [[A_021]] = phi ptr [ [[A_1_LCSSA]], %[[FOR_COND_LOOPEXIT]] ], [ undef, %[[ENTRY]] ]
45+
; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr @c, align 4
46+
; CHECK-NEXT: [[TOBOOL215:%.*]] = icmp eq i32 [[TMP2]], 0
47+
; CHECK-NEXT: br i1 [[TOBOOL215]], label %[[FOR_COND_LOOPEXIT]], label %[[FOR_BODY3_PREHEADER:.*]]
48+
; CHECK: [[FOR_BODY3_PREHEADER]]:
49+
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[TMP2]], -1
50+
; CHECK-NEXT: [[TMP1]] = zext i32 [[TMP0]] to i64
51+
; CHECK-NEXT: [[XTRAITER:%.*]] = and i32 [[TMP2]], 1
52+
; CHECK-NEXT: [[LCMP_MOD_NOT:%.*]] = icmp eq i32 [[XTRAITER]], 0
53+
; CHECK-NEXT: br i1 [[LCMP_MOD_NOT]], label %[[FOR_BODY3_PROL_LOOPEXIT]], label %[[FOR_BODY3_PROL:.*]]
54+
; CHECK: [[FOR_BODY3_PROL]]:
55+
; CHECK-NEXT: [[DEC18_PROL:%.*]] = add nsw i32 [[TMP2]], -1
56+
; CHECK-NEXT: [[TMP3_PROL:%.*]] = load i8, ptr [[A_021]], align 1
57+
; CHECK-NEXT: [[CMP_PROL:%.*]] = icmp eq i8 [[TMP3_PROL]], 0
58+
; CHECK-NEXT: br i1 [[CMP_PROL]], label %[[IF_THEN_PROL:.*]], label %[[FOR_INC_PROL:.*]]
59+
; CHECK: [[IF_THEN_PROL]]:
60+
; CHECK-NEXT: [[ARRAYIDX_PROL:%.*]] = getelementptr inbounds i8, ptr [[R_022]], i64 2
61+
; CHECK-NEXT: store i16 0, ptr [[ARRAYIDX_PROL]], align 2
62+
; CHECK-NEXT: store i16 0, ptr [[R_022]], align 2
63+
; CHECK-NEXT: [[ARRAYIDX5_PROL:%.*]] = getelementptr inbounds i8, ptr [[R_022]], i64 4
64+
; CHECK-NEXT: store i16 0, ptr [[ARRAYIDX5_PROL]], align 2
65+
; CHECK-NEXT: br label %[[FOR_INC_PROL]]
66+
; CHECK: [[FOR_INC_PROL]]:
67+
; CHECK-NEXT: [[INCDEC_PTR_PROL:%.*]] = getelementptr inbounds i8, ptr [[A_021]], i64 1
68+
; CHECK-NEXT: [[ADD_PTR_PROL:%.*]] = getelementptr inbounds i8, ptr [[R_022]], i64 6
69+
; CHECK-NEXT: br label %[[FOR_BODY3_PROL_LOOPEXIT]]
70+
; CHECK: [[FOR_BODY3_PROL_LOOPEXIT]]:
71+
; CHECK-NEXT: [[ADD_PTR_LCSSA_UNR]] = phi ptr [ poison, %[[FOR_BODY3_PREHEADER]] ], [ [[ADD_PTR_PROL]], %[[FOR_INC_PROL]] ]
72+
; CHECK-NEXT: [[DEC18_IN_UNR:%.*]] = phi i32 [ [[TMP2]], %[[FOR_BODY3_PREHEADER]] ], [ [[DEC18_PROL]], %[[FOR_INC_PROL]] ]
73+
; CHECK-NEXT: [[R_117_UNR:%.*]] = phi ptr [ [[R_022]], %[[FOR_BODY3_PREHEADER]] ], [ [[ADD_PTR_PROL]], %[[FOR_INC_PROL]] ]
74+
; CHECK-NEXT: [[A_116_UNR:%.*]] = phi ptr [ [[A_021]], %[[FOR_BODY3_PREHEADER]] ], [ [[INCDEC_PTR_PROL]], %[[FOR_INC_PROL]] ]
75+
; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP0]], 0
76+
; CHECK-NEXT: br i1 [[TMP4]], label %[[FOR_COND_LOOPEXIT_LOOPEXIT]], label %[[FOR_BODY3:.*]]
77+
; CHECK: [[FOR_BODY3]]:
78+
; CHECK-NEXT: [[DEC18_IN:%.*]] = phi i32 [ [[DEC18_1:%.*]], %[[FOR_INC_1]] ], [ [[DEC18_IN_UNR]], %[[FOR_BODY3_PROL_LOOPEXIT]] ]
79+
; CHECK-NEXT: [[R_117:%.*]] = phi ptr [ [[ADD_PTR_1]], %[[FOR_INC_1]] ], [ [[R_117_UNR]], %[[FOR_BODY3_PROL_LOOPEXIT]] ]
80+
; CHECK-NEXT: [[A_116:%.*]] = phi ptr [ [[INCDEC_PTR_1:%.*]], %[[FOR_INC_1]] ], [ [[A_116_UNR]], %[[FOR_BODY3_PROL_LOOPEXIT]] ]
81+
; CHECK-NEXT: [[TMP3:%.*]] = load i8, ptr [[A_116]], align 1
82+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[TMP3]], 0
83+
; CHECK-NEXT: br i1 [[CMP]], label %[[IF_THEN:.*]], label %[[FOR_INC:.*]]
84+
; CHECK: [[IF_THEN]]:
85+
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[R_117]], i64 2
86+
; CHECK-NEXT: store i16 0, ptr [[ARRAYIDX]], align 2
87+
; CHECK-NEXT: store i16 0, ptr [[R_117]], align 2
88+
; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds i8, ptr [[R_117]], i64 4
89+
; CHECK-NEXT: store i16 0, ptr [[ARRAYIDX5]], align 2
90+
; CHECK-NEXT: br label %[[FOR_INC]]
91+
; CHECK: [[FOR_INC]]:
92+
; CHECK-NEXT: [[INCDEC_PTR:%.*]] = getelementptr inbounds i8, ptr [[A_116]], i64 1
93+
; CHECK-NEXT: [[DEC18_1]] = add nsw i32 [[DEC18_IN]], -2
94+
; CHECK-NEXT: [[TMP3_1:%.*]] = load i8, ptr [[INCDEC_PTR]], align 1
95+
; CHECK-NEXT: [[CMP_1:%.*]] = icmp eq i8 [[TMP3_1]], 0
96+
; CHECK-NEXT: br i1 [[CMP_1]], label %[[IF_THEN_1:.*]], label %[[FOR_INC_1]]
97+
; CHECK: [[IF_THEN_1]]:
98+
; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, ptr [[R_117]], i64 6
99+
; CHECK-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr inbounds i8, ptr [[R_117]], i64 8
100+
; CHECK-NEXT: store i16 0, ptr [[ARRAYIDX_1]], align 2
101+
; CHECK-NEXT: store i16 0, ptr [[ADD_PTR]], align 2
102+
; CHECK-NEXT: [[ARRAYIDX5_1:%.*]] = getelementptr inbounds i8, ptr [[R_117]], i64 10
103+
; CHECK-NEXT: store i16 0, ptr [[ARRAYIDX5_1]], align 2
104+
; CHECK-NEXT: br label %[[FOR_INC_1]]
105+
; CHECK: [[FOR_INC_1]]:
106+
; CHECK-NEXT: [[INCDEC_PTR_1]] = getelementptr inbounds i8, ptr [[A_116]], i64 2
107+
; CHECK-NEXT: [[ADD_PTR_1]] = getelementptr inbounds i8, ptr [[R_117]], i64 12
108+
; CHECK-NEXT: [[TOBOOL2_1:%.*]] = icmp eq i32 [[DEC18_1]], 0
109+
; CHECK-NEXT: br i1 [[TOBOOL2_1]], label %[[FOR_COND_LOOPEXIT_LOOPEXIT]], label %[[FOR_BODY3]], !llvm.loop [[LOOP0:![0-9]+]]
110+
; CHECK: [[FOR_END6]]:
111+
; CHECK-NEXT: ret void
112+
;
24113
entry:
25-
%tmp = load i32, ptr @b, align 4
26-
%tobool20 = icmp eq i32 %tmp, 0
114+
%t = load i32, ptr @b, align 4
115+
%tobool20 = icmp eq i32 %t, 0
27116
br i1 %tobool20, label %for.end6, label %for.body.lr.ph
28117

29118
for.body.lr.ph: ; preds = %entry
@@ -37,27 +126,27 @@ for.cond1.for.cond.loopexit_crit_edge: ; preds = %for.inc
37126
for.cond.loopexit: ; preds = %for.body, %for.cond1.for.cond.loopexit_crit_edge
38127
%r.1.lcssa = phi ptr [ %add.ptr.lcssa, %for.cond1.for.cond.loopexit_crit_edge ], [ %r.022, %for.body ]
39128
%a.1.lcssa = phi ptr [ %incdec.ptr.lcssa, %for.cond1.for.cond.loopexit_crit_edge ], [ %a.021, %for.body ]
40-
%tmp1 = load i32, ptr @b, align 4
41-
%tobool = icmp eq i32 %tmp1, 0
129+
%t1 = load i32, ptr @b, align 4
130+
%tobool = icmp eq i32 %t1, 0
42131
br i1 %tobool, label %for.cond.for.end6_crit_edge, label %for.body
43132

44133
for.body: ; preds = %for.cond.loopexit, %for.body.lr.ph
45134
%r.022 = phi ptr [ undef, %for.body.lr.ph ], [ %r.1.lcssa, %for.cond.loopexit ]
46135
%a.021 = phi ptr [ undef, %for.body.lr.ph ], [ %a.1.lcssa, %for.cond.loopexit ]
47-
%tmp2 = load i32, ptr @c, align 4
48-
%tobool215 = icmp eq i32 %tmp2, 0
136+
%t2 = load i32, ptr @c, align 4
137+
%tobool215 = icmp eq i32 %t2, 0
49138
br i1 %tobool215, label %for.cond.loopexit, label %for.body3.lr.ph
50139

51140
for.body3.lr.ph: ; preds = %for.body
52141
br label %for.body3
53142

54143
for.body3: ; preds = %for.inc, %for.body3.lr.ph
55-
%dec18.in = phi i32 [ %tmp2, %for.body3.lr.ph ], [ %dec18, %for.inc ]
144+
%dec18.in = phi i32 [ %t2, %for.body3.lr.ph ], [ %dec18, %for.inc ]
56145
%r.117 = phi ptr [ %r.022, %for.body3.lr.ph ], [ %add.ptr, %for.inc ]
57146
%a.116 = phi ptr [ %a.021, %for.body3.lr.ph ], [ %incdec.ptr, %for.inc ]
58147
%dec18 = add nsw i32 %dec18.in, -1
59-
%tmp3 = load i8, ptr %a.116, align 1
60-
%cmp = icmp eq i8 %tmp3, 0
148+
%t3 = load i8, ptr %a.116, align 1
149+
%cmp = icmp eq i8 %t3, 0
61150
br i1 %cmp, label %if.then, label %for.inc
62151

63152
if.then: ; preds = %for.body3
@@ -83,3 +172,7 @@ for.end6: ; preds = %for.cond.for.end6_c
83172

84173
!0 = !{!0, !1}
85174
!1 = !{!"llvm.loop.unroll.count", i32 2}
175+
;.
176+
; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]]}
177+
; CHECK: [[META1]] = !{!"llvm.loop.unroll.disable"}
178+
;.

‎llvm/test/Transforms/SCCP/loadtest2.ll

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,12 +1,14 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
12
; RUN: opt < %s -data-layout="E-p:32:32" -passes=ipsccp -S | FileCheck %s
23

34
@j = internal global i32 undef, align 4
45

56
; Make sure we do not mark loads from undef as overdefined.
67
define i32 @test5(i32 %b) {
7-
; CHECK-LABEL: define i32 @test5(i32 %b)
8-
; CHECK-NEXT: %add = add nsw i32 undef, %b
9-
; CHECK-NEXT: ret i32 %add
8+
; CHECK-LABEL: define i32 @test5(
9+
; CHECK-SAME: i32 [[B:%.*]]) {
10+
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 undef, [[B]]
11+
; CHECK-NEXT: ret i32 [[ADD]]
1012
;
1113
%l = load i32, ptr @j, align 4
1214
%add = add nsw i32 %l, %b

‎llvm/test/Transforms/SCCP/select.ll

Lines changed: 20 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -1,32 +1,36 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
12
; RUN: opt < %s -passes=sccp -S | FileCheck %s
23

34
define i32 @test1(i1 %C) {
45
; CHECK-LABEL: define i32 @test1(
5-
; CHECK-NEXT: ret i32 0
6+
; CHECK-SAME: i1 [[C:%.*]]) {
7+
; CHECK-NEXT: ret i32 0
68
;
7-
%X = select i1 %C, i32 0, i32 0 ; <i32> [#uses=1]
8-
ret i32 %X
9+
%X = select i1 %C, i32 0, i32 0
10+
ret i32 %X
911
}
1012

1113
define i32 @test2(i1 %C) {
1214
; CHECK-LABEL: define i32 @test2(
13-
; CHECK-NEXT: ret i32 0
15+
; CHECK-SAME: i1 [[C:%.*]]) {
16+
; CHECK-NEXT: ret i32 0
1417
;
15-
%X = select i1 %C, i32 0, i32 undef ; <i32> [#uses=1]
16-
ret i32 %X
18+
%X = select i1 %C, i32 0, i32 undef
19+
ret i32 %X
1720
}
1821

1922
define i1 @f2(i32 %x, i1 %cmp) {
20-
; CHECK-LABEL: define i1 @f2(i32 %x, i1 %cmp) {
21-
; CHECK-NEXT: %sel.1 = select i1 %cmp, i32 %x, i32 10
22-
; CHECK-NEXT: %c.1 = icmp sgt i32 %sel.1, 300
23-
; CHECK-NEXT: %c.2 = icmp sgt i32 %sel.1, 100
24-
; CHECK-NEXT: %c.3 = icmp eq i32 %sel.1, 50
25-
; CHECK-NEXT: %c.4 = icmp slt i32 %sel.1, 9
26-
; CHECK-NEXT: %res.1 = add i1 %c.1, %c.2
27-
; CHECK-NEXT: %res.2 = add i1 %res.1, %c.3
28-
; CHECK-NEXT: %res.3 = add i1 %res.2, %c.4
29-
; CHECK-NEXT: ret i1 %res.3
23+
; CHECK-LABEL: define i1 @f2(
24+
; CHECK-SAME: i32 [[X:%.*]], i1 [[CMP:%.*]]) {
25+
; CHECK-NEXT: [[SEL_1:%.*]] = select i1 [[CMP]], i32 [[X]], i32 10
26+
; CHECK-NEXT: [[C_1:%.*]] = icmp sgt i32 [[SEL_1]], 300
27+
; CHECK-NEXT: [[C_2:%.*]] = icmp sgt i32 [[SEL_1]], 100
28+
; CHECK-NEXT: [[C_3:%.*]] = icmp eq i32 [[SEL_1]], 50
29+
; CHECK-NEXT: [[C_4:%.*]] = icmp slt i32 [[SEL_1]], 9
30+
; CHECK-NEXT: [[RES_1:%.*]] = add i1 [[C_1]], [[C_2]]
31+
; CHECK-NEXT: [[RES_2:%.*]] = add i1 [[RES_1]], [[C_3]]
32+
; CHECK-NEXT: [[RES_3:%.*]] = add i1 [[RES_2]], [[C_4]]
33+
; CHECK-NEXT: ret i1 [[RES_3]]
3034
;
3135
%sel.1 = select i1 %cmp, i32 %x, i32 10
3236
%c.1 = icmp sgt i32 %sel.1, 300

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