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[WebAssembly] Change half-precision feature name to fp16.
This better aligns with how the feature is being referred to and what runtimes (V8) are calling it.
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-65
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17 files changed

+63
-65
lines changed

‎clang/include/clang/Basic/BuiltinsWebAssembly.def

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -135,10 +135,10 @@ TARGET_BUILTIN(__builtin_wasm_min_f64x2, "V2dV2dV2d", "nc", "simd128")
135135
TARGET_BUILTIN(__builtin_wasm_max_f64x2, "V2dV2dV2d", "nc", "simd128")
136136
TARGET_BUILTIN(__builtin_wasm_pmin_f64x2, "V2dV2dV2d", "nc", "simd128")
137137
TARGET_BUILTIN(__builtin_wasm_pmax_f64x2, "V2dV2dV2d", "nc", "simd128")
138-
TARGET_BUILTIN(__builtin_wasm_min_f16x8, "V8hV8hV8h", "nc", "half-precision")
139-
TARGET_BUILTIN(__builtin_wasm_max_f16x8, "V8hV8hV8h", "nc", "half-precision")
140-
TARGET_BUILTIN(__builtin_wasm_pmin_f16x8, "V8hV8hV8h", "nc", "half-precision")
141-
TARGET_BUILTIN(__builtin_wasm_pmax_f16x8, "V8hV8hV8h", "nc", "half-precision")
138+
TARGET_BUILTIN(__builtin_wasm_min_f16x8, "V8hV8hV8h", "nc", "fp16")
139+
TARGET_BUILTIN(__builtin_wasm_max_f16x8, "V8hV8hV8h", "nc", "fp16")
140+
TARGET_BUILTIN(__builtin_wasm_pmin_f16x8, "V8hV8hV8h", "nc", "fp16")
141+
TARGET_BUILTIN(__builtin_wasm_pmax_f16x8, "V8hV8hV8h", "nc", "fp16")
142142

143143
TARGET_BUILTIN(__builtin_wasm_ceil_f32x4, "V4fV4f", "nc", "simd128")
144144
TARGET_BUILTIN(__builtin_wasm_floor_f32x4, "V4fV4f", "nc", "simd128")
@@ -170,8 +170,8 @@ TARGET_BUILTIN(__builtin_wasm_relaxed_madd_f32x4, "V4fV4fV4fV4f", "nc", "relaxed
170170
TARGET_BUILTIN(__builtin_wasm_relaxed_nmadd_f32x4, "V4fV4fV4fV4f", "nc", "relaxed-simd")
171171
TARGET_BUILTIN(__builtin_wasm_relaxed_madd_f64x2, "V2dV2dV2dV2d", "nc", "relaxed-simd")
172172
TARGET_BUILTIN(__builtin_wasm_relaxed_nmadd_f64x2, "V2dV2dV2dV2d", "nc", "relaxed-simd")
173-
TARGET_BUILTIN(__builtin_wasm_relaxed_madd_f16x8, "V8hV8hV8hV8h", "nc", "half-precision")
174-
TARGET_BUILTIN(__builtin_wasm_relaxed_nmadd_f16x8, "V8hV8hV8hV8h", "nc", "half-precision")
173+
TARGET_BUILTIN(__builtin_wasm_relaxed_madd_f16x8, "V8hV8hV8hV8h", "nc", "fp16")
174+
TARGET_BUILTIN(__builtin_wasm_relaxed_nmadd_f16x8, "V8hV8hV8hV8h", "nc", "fp16")
175175

176176
TARGET_BUILTIN(__builtin_wasm_relaxed_laneselect_i8x16, "V16ScV16ScV16ScV16Sc", "nc", "relaxed-simd")
177177
TARGET_BUILTIN(__builtin_wasm_relaxed_laneselect_i16x8, "V8sV8sV8sV8s", "nc", "relaxed-simd")
@@ -197,11 +197,11 @@ TARGET_BUILTIN(__builtin_wasm_relaxed_dot_i8x16_i7x16_add_s_i32x4, "V4iV16ScV16S
197197
TARGET_BUILTIN(__builtin_wasm_relaxed_dot_bf16x8_add_f32_f32x4, "V4fV8UsV8UsV4f", "nc", "relaxed-simd")
198198

199199
// Half-Precision (fp16)
200-
TARGET_BUILTIN(__builtin_wasm_loadf16_f32, "fh*", "nU", "half-precision")
201-
TARGET_BUILTIN(__builtin_wasm_storef16_f32, "vfh*", "n", "half-precision")
202-
TARGET_BUILTIN(__builtin_wasm_splat_f16x8, "V8hf", "nc", "half-precision")
203-
TARGET_BUILTIN(__builtin_wasm_extract_lane_f16x8, "fV8hi", "nc", "half-precision")
204-
TARGET_BUILTIN(__builtin_wasm_replace_lane_f16x8, "V8hV8hif", "nc", "half-precision")
200+
TARGET_BUILTIN(__builtin_wasm_loadf16_f32, "fh*", "nU", "fp16")
201+
TARGET_BUILTIN(__builtin_wasm_storef16_f32, "vfh*", "n", "fp16")
202+
TARGET_BUILTIN(__builtin_wasm_splat_f16x8, "V8hf", "nc", "fp16")
203+
TARGET_BUILTIN(__builtin_wasm_extract_lane_f16x8, "fV8hi", "nc", "fp16")
204+
TARGET_BUILTIN(__builtin_wasm_replace_lane_f16x8, "V8hV8hif", "nc", "fp16")
205205

206206
// Reference Types builtins
207207
// Some builtins are custom type-checked - see 't' as part of the third argument,

‎clang/include/clang/Driver/Options.td

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5033,8 +5033,8 @@ def mexception_handing : Flag<["-"], "mexception-handling">, Group<m_wasm_Featur
50335033
def mno_exception_handing : Flag<["-"], "mno-exception-handling">, Group<m_wasm_Features_Group>;
50345034
def mextended_const : Flag<["-"], "mextended-const">, Group<m_wasm_Features_Group>;
50355035
def mno_extended_const : Flag<["-"], "mno-extended-const">, Group<m_wasm_Features_Group>;
5036-
def mhalf_precision : Flag<["-"], "mhalf-precision">, Group<m_wasm_Features_Group>;
5037-
def mno_half_precision : Flag<["-"], "mno-half-precision">, Group<m_wasm_Features_Group>;
5036+
def mfp16 : Flag<["-"], "mfp16">, Group<m_wasm_Features_Group>;
5037+
def mno_fp16 : Flag<["-"], "mno-fp16">, Group<m_wasm_Features_Group>;
50385038
def mmultimemory : Flag<["-"], "mmultimemory">, Group<m_wasm_Features_Group>;
50395039
def mno_multimemory : Flag<["-"], "mno-multimemory">, Group<m_wasm_Features_Group>;
50405040
def mmultivalue : Flag<["-"], "mmultivalue">, Group<m_wasm_Features_Group>;

‎clang/lib/Basic/Targets/WebAssembly.cpp

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -49,7 +49,7 @@ bool WebAssemblyTargetInfo::hasFeature(StringRef Feature) const {
4949
.Case("bulk-memory", HasBulkMemory)
5050
.Case("exception-handling", HasExceptionHandling)
5151
.Case("extended-const", HasExtendedConst)
52-
.Case("half-precision", HasHalfPrecision)
52+
.Case("fp16", HasFP16)
5353
.Case("multimemory", HasMultiMemory)
5454
.Case("multivalue", HasMultivalue)
5555
.Case("mutable-globals", HasMutableGlobals)
@@ -84,8 +84,8 @@ void WebAssemblyTargetInfo::getTargetDefines(const LangOptions &Opts,
8484
Builder.defineMacro("__wasm_extended_const__");
8585
if (HasMultiMemory)
8686
Builder.defineMacro("__wasm_multimemory__");
87-
if (HasHalfPrecision)
88-
Builder.defineMacro("__wasm_half_precision__");
87+
if (HasFP16)
88+
Builder.defineMacro("__wasm_fp16__");
8989
if (HasMultivalue)
9090
Builder.defineMacro("__wasm_multivalue__");
9191
if (HasMutableGlobals)
@@ -162,7 +162,7 @@ bool WebAssemblyTargetInfo::initFeatureMap(
162162
Features["bulk-memory"] = true;
163163
Features["exception-handling"] = true;
164164
Features["extended-const"] = true;
165-
Features["half-precision"] = true;
165+
Features["fp16"] = true;
166166
Features["multimemory"] = true;
167167
Features["nontrapping-fptoint"] = true;
168168
Features["tail-call"] = true;
@@ -212,13 +212,13 @@ bool WebAssemblyTargetInfo::handleTargetFeatures(
212212
HasExtendedConst = false;
213213
continue;
214214
}
215-
if (Feature == "+half-precision") {
215+
if (Feature == "+fp16") {
216216
SIMDLevel = std::max(SIMDLevel, SIMD128);
217-
HasHalfPrecision = true;
217+
HasFP16 = true;
218218
continue;
219219
}
220-
if (Feature == "-half-precision") {
221-
HasHalfPrecision = false;
220+
if (Feature == "-fp16") {
221+
HasFP16 = false;
222222
continue;
223223
}
224224
if (Feature == "+multimemory") {

‎clang/lib/Basic/Targets/WebAssembly.h

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -57,7 +57,7 @@ class LLVM_LIBRARY_VISIBILITY WebAssemblyTargetInfo : public TargetInfo {
5757
bool HasBulkMemory = false;
5858
bool HasExceptionHandling = false;
5959
bool HasExtendedConst = false;
60-
bool HasHalfPrecision = false;
60+
bool HasFP16 = false;
6161
bool HasMultiMemory = false;
6262
bool HasMultivalue = false;
6363
bool HasMutableGlobals = false;
@@ -90,9 +90,7 @@ class LLVM_LIBRARY_VISIBILITY WebAssemblyTargetInfo : public TargetInfo {
9090

9191
StringRef getABI() const override;
9292
bool setABI(const std::string &Name) override;
93-
bool useFP16ConversionIntrinsics() const override {
94-
return !HasHalfPrecision;
95-
}
93+
bool useFP16ConversionIntrinsics() const override { return !HasFP16; }
9694

9795
protected:
9896
void getTargetDefines(const LangOptions &Opts,

‎clang/test/CodeGen/builtins-wasm.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
1-
// RUN: %clang_cc1 -triple wasm32-unknown-unknown -target-feature +reference-types -target-feature +simd128 -target-feature +relaxed-simd -target-feature +nontrapping-fptoint -target-feature +exception-handling -target-feature +bulk-memory -target-feature +atomics -target-feature +half-precision -flax-vector-conversions=none -O3 -emit-llvm -o - %s | FileCheck %s -check-prefixes WEBASSEMBLY,WEBASSEMBLY32
2-
// RUN: %clang_cc1 -triple wasm64-unknown-unknown -target-feature +reference-types -target-feature +simd128 -target-feature +relaxed-simd -target-feature +nontrapping-fptoint -target-feature +exception-handling -target-feature +bulk-memory -target-feature +atomics -target-feature +half-precision -flax-vector-conversions=none -O3 -emit-llvm -o - %s | FileCheck %s -check-prefixes WEBASSEMBLY,WEBASSEMBLY64
1+
// RUN: %clang_cc1 -triple wasm32-unknown-unknown -target-feature +reference-types -target-feature +simd128 -target-feature +relaxed-simd -target-feature +nontrapping-fptoint -target-feature +exception-handling -target-feature +bulk-memory -target-feature +atomics -target-feature +fp16 -flax-vector-conversions=none -O3 -emit-llvm -o - %s | FileCheck %s -check-prefixes WEBASSEMBLY,WEBASSEMBLY32
2+
// RUN: %clang_cc1 -triple wasm64-unknown-unknown -target-feature +reference-types -target-feature +simd128 -target-feature +relaxed-simd -target-feature +nontrapping-fptoint -target-feature +exception-handling -target-feature +bulk-memory -target-feature +atomics -target-feature +fp16 -flax-vector-conversions=none -O3 -emit-llvm -o - %s | FileCheck %s -check-prefixes WEBASSEMBLY,WEBASSEMBLY64
33
// RUN: not %clang_cc1 -triple wasm64-unknown-unknown -target-feature +reference-types -target-feature +nontrapping-fptoint -target-feature +exception-handling -target-feature +bulk-memory -target-feature +atomics -flax-vector-conversions=none -O3 -emit-llvm -o - %s 2>&1 | FileCheck %s -check-prefixes MISSING-SIMD
44

55
// SIMD convenience types

‎clang/test/Driver/wasm-features.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -35,11 +35,11 @@
3535
// EXTENDED-CONST: "-target-feature" "+extended-const"
3636
// NO-EXTENDED-CONST: "-target-feature" "-extended-const"
3737

38-
// RUN: %clang --target=wasm32-unknown-unknown -### %s -mhalf-precision 2>&1 | FileCheck %s -check-prefix=HALF-PRECISION
39-
// RUN: %clang --target=wasm32-unknown-unknown -### %s -mno-half-precision 2>&1 | FileCheck %s -check-prefix=NO-HALF-PRECISION
38+
// RUN: %clang --target=wasm32-unknown-unknown -### %s -mfp16 2>&1 | FileCheck %s -check-prefix=HALF-PRECISION
39+
// RUN: %clang --target=wasm32-unknown-unknown -### %s -mno-fp16 2>&1 | FileCheck %s -check-prefix=NO-HALF-PRECISION
4040

41-
// HALF-PRECISION: "-target-feature" "+half-precision"
42-
// NO-HALF-PRECISION: "-target-feature" "-half-precision"
41+
// HALF-PRECISION: "-target-feature" "+fp16"
42+
// NO-HALF-PRECISION: "-target-feature" "-fp16"
4343

4444
// RUN: %clang --target=wasm32-unknown-unknown -### %s -mmultimemory 2>&1 | FileCheck %s -check-prefix=MULTIMEMORY
4545
// RUN: %clang --target=wasm32-unknown-unknown -### %s -mno-multimemory 2>&1 | FileCheck %s -check-prefix=NO-MULTIMEMORY

‎clang/test/Preprocessor/wasm-target-features.c

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -44,13 +44,13 @@
4444
// EXTENDED-CONST: #define __wasm_extended_const__ 1{{$}}
4545

4646
// RUN: %clang -E -dM %s -o - 2>&1 \
47-
// RUN: -target wasm32-unknown-unknown -mhalf-precision \
48-
// RUN: | FileCheck %s -check-prefix=HALF-PRECISION
47+
// RUN: -target wasm32-unknown-unknown -mfp16 \
48+
// RUN: | FileCheck %s -check-prefix=FP16
4949
// RUN: %clang -E -dM %s -o - 2>&1 \
50-
// RUN: -target wasm64-unknown-unknown -mhalf-precision \
51-
// RUN: | FileCheck %s -check-prefix=HALF-PRECISION
50+
// RUN: -target wasm64-unknown-unknown -mfp16 \
51+
// RUN: | FileCheck %s -check-prefix=FP16
5252
//
53-
// HALF-PRECISION: #define __wasm_half_precision__ 1{{$}}
53+
// FP16: #define __wasm_fp16__ 1{{$}}
5454

5555
// RUN: %clang -E -dM %s -o - 2>&1 \
5656
// RUN: -target wasm32-unknown-unknown -mmultimemory \
@@ -144,7 +144,7 @@
144144
// MVP-NOT: #define __wasm_bulk_memory__ 1{{$}}
145145
// MVP-NOT: #define __wasm_exception_handling__ 1{{$}}
146146
// MVP-NOT: #define __wasm_extended_const__ 1{{$}}
147-
// MVP-NOT: #define __wasm_half_precision__ 1{{$}}
147+
// MVP-NOT: #define __wasm_fp16__ 1{{$}}
148148
// MVP-NOT: #define __wasm_multimemory__ 1{{$}}
149149
// MVP-NOT: #define __wasm_multivalue__ 1{{$}}
150150
// MVP-NOT: #define __wasm_mutable_globals__ 1{{$}}
@@ -178,7 +178,7 @@
178178
// GENERIC-NOT: #define __wasm_bulk_memory__ 1{{$}}
179179
// GENERIC-NOT: #define __wasm_exception_handling__ 1{{$}}
180180
// GENERIC-NOT: #define __wasm_extended_const__ 1{{$}}
181-
// GENERIC-NOT: #define __wasm_half_precision__ 1{{$}}
181+
// GENERIC-NOT: #define __wasm__fp16__ 1{{$}}
182182
// GENERIC-NOT: #define __wasm_multimemory__ 1{{$}}
183183
// GENERIC-NOT: #define __wasm_nontrapping_fptoint__ 1{{$}}
184184
// GENERIC-NOT: #define __wasm_relaxed_simd__ 1{{$}}
@@ -196,7 +196,7 @@
196196
// BLEEDING-EDGE-INCLUDE-DAG: #define __wasm_bulk_memory__ 1{{$}}
197197
// BLEEDING-EDGE-INCLUDE-DAG: #define __wasm_exception_handling__ 1{{$}}
198198
// BLEEDING-EDGE-INCLUDE-DAG: #define __wasm_extended_const__ 1{{$}}
199-
// BLEEDING-EDGE-INCLUDE-DAG: #define __wasm_half_precision__ 1{{$}}
199+
// BLEEDING-EDGE-INCLUDE-DAG: #define __wasm_fp16__ 1{{$}}
200200
// BLEEDING-EDGE-INCLUDE-DAG: #define __wasm_multimemory__ 1{{$}}
201201
// BLEEDING-EDGE-INCLUDE-DAG: #define __wasm_multivalue__ 1{{$}}
202202
// BLEEDING-EDGE-INCLUDE-DAG: #define __wasm_mutable_globals__ 1{{$}}

‎llvm/lib/Target/WebAssembly/WebAssembly.td

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -37,9 +37,9 @@ def FeatureExtendedConst :
3737
SubtargetFeature<"extended-const", "HasExtendedConst", "true",
3838
"Enable extended const expressions">;
3939

40-
def FeatureHalfPrecision :
41-
SubtargetFeature<"half-precision", "HasHalfPrecision", "true",
42-
"Enable half precision instructions">;
40+
def FeatureFP16 :
41+
SubtargetFeature<"fp16", "HasFP16", "true",
42+
"Enable FP16 instructions">;
4343

4444
def FeatureMultiMemory :
4545
SubtargetFeature<"multimemory", "HasMultiMemory", "true",
@@ -117,7 +117,7 @@ def : ProcessorModel<"generic", NoSchedModel,
117117
def : ProcessorModel<"bleeding-edge", NoSchedModel,
118118
[FeatureAtomics, FeatureBulkMemory,
119119
FeatureExceptionHandling, FeatureExtendedConst,
120-
FeatureHalfPrecision, FeatureMultiMemory,
120+
FeatureFP16, FeatureMultiMemory,
121121
FeatureMultivalue, FeatureMutableGlobals,
122122
FeatureNontrappingFPToInt, FeatureRelaxedSIMD,
123123
FeatureReferenceTypes, FeatureSIMD128, FeatureSignExt,

‎llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -70,7 +70,7 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering(
7070
addRegisterClass(MVT::v2i64, &WebAssembly::V128RegClass);
7171
addRegisterClass(MVT::v2f64, &WebAssembly::V128RegClass);
7272
}
73-
if (Subtarget->hasHalfPrecision()) {
73+
if (Subtarget->hasFP16()) {
7474
addRegisterClass(MVT::v8f16, &WebAssembly::V128RegClass);
7575
}
7676
if (Subtarget->hasReferenceTypes()) {
@@ -146,7 +146,7 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering(
146146
setTruncStoreAction(T, MVT::f16, Expand);
147147
}
148148

149-
if (Subtarget->hasHalfPrecision()) {
149+
if (Subtarget->hasFP16()) {
150150
setOperationAction(ISD::FMINIMUM, MVT::v8f16, Legal);
151151
setOperationAction(ISD::FMAXIMUM, MVT::v8f16, Legal);
152152
}

‎llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -38,9 +38,9 @@ def HasExtendedConst :
3838
Predicate<"Subtarget->hasExtendedConst()">,
3939
AssemblerPredicate<(all_of FeatureExtendedConst), "extended-const">;
4040

41-
def HasHalfPrecision :
42-
Predicate<"Subtarget->hasHalfPrecision()">,
43-
AssemblerPredicate<(all_of FeatureHalfPrecision), "half-precision">;
41+
def HasFP16 :
42+
Predicate<"Subtarget->hasFP16()">,
43+
AssemblerPredicate<(all_of FeatureFP16), "fp16">;
4444

4545
def HasMultiMemory :
4646
Predicate<"Subtarget->hasMultiMemory()">,

‎llvm/lib/Target/WebAssembly/WebAssemblyInstrMemory.td

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -74,7 +74,7 @@ defm LOAD32_U_I64 : WebAssemblyLoad<I64, "i64.load32_u", 0x35, []>;
7474

7575
// Half-precision load.
7676
defm LOAD_F16_F32 :
77-
WebAssemblyLoad<F32, "f32.load_f16", 0xfc30, [HasHalfPrecision]>;
77+
WebAssemblyLoad<F32, "f32.load_f16", 0xfc30, [HasFP16]>;
7878

7979
// Pattern matching
8080

@@ -174,7 +174,7 @@ defm STORE32_I64 : WebAssemblyStore<I64, "i64.store32", 0x3e>;
174174

175175
// Half-precision store.
176176
defm STORE_F16_F32 :
177-
WebAssemblyStore<F32, "f32.store_f16", 0xfc31, [HasHalfPrecision]>;
177+
WebAssemblyStore<F32, "f32.store_f16", 0xfc31, [HasFP16]>;
178178

179179
defm : StorePat<i32, truncstorei8, "STORE8_I32">;
180180
defm : StorePat<i32, truncstorei16, "STORE16_I32">;

‎llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -43,7 +43,7 @@ multiclass HALF_PRECISION_I<dag oops_r, dag iops_r, dag oops_s, dag iops_s,
4343
list<dag> pattern_r, string asmstr_r = "",
4444
string asmstr_s = "", bits<32> simdop = -1> {
4545
defm "" : ABSTRACT_SIMD_I<oops_r, iops_r, oops_s, iops_s, pattern_r, asmstr_r,
46-
asmstr_s, simdop, [HasHalfPrecision]>;
46+
asmstr_s, simdop, [HasFP16]>;
4747
}
4848

4949

@@ -750,7 +750,7 @@ multiclass SIMDCondition<Vec vec, string name, CondCode cond, bits<32> simdop,
750750

751751
multiclass HalfPrecisionCondition<Vec vec, string name, CondCode cond,
752752
bits<32> simdop> {
753-
defm "" : SIMDCondition<vec, name, cond, simdop, [HasHalfPrecision]>;
753+
defm "" : SIMDCondition<vec, name, cond, simdop, [HasFP16]>;
754754
}
755755

756756
multiclass SIMDConditionInt<string name, CondCode cond, bits<32> baseInst> {
@@ -832,7 +832,7 @@ multiclass SIMDBinary<Vec vec, SDPatternOperator node, string name,
832832

833833
multiclass HalfPrecisionBinary<Vec vec, SDPatternOperator node, string name,
834834
bits<32> simdop> {
835-
defm "" : SIMDBinary<vec, node, name, simdop, [HasHalfPrecision]>;
835+
defm "" : SIMDBinary<vec, node, name, simdop, [HasFP16]>;
836836
}
837837

838838
multiclass SIMDBitwise<SDPatternOperator node, string name, bits<32> simdop,
@@ -857,7 +857,7 @@ multiclass SIMDUnary<Vec vec, SDPatternOperator node, string name,
857857

858858
multiclass HalfPrecisionUnary<Vec vec, SDPatternOperator node, string name,
859859
bits<32> simdop> {
860-
defm "" : SIMDUnary<vec, node, name, simdop, [HasHalfPrecision]>;
860+
defm "" : SIMDUnary<vec, node, name, simdop, [HasFP16]>;
861861
}
862862

863863
// Bitwise logic: v128.not
@@ -1355,7 +1355,7 @@ multiclass SIMDConvert<Vec vec, Vec arg, SDPatternOperator op, string name,
13551355

13561356
multiclass HalfPrecisionConvert<Vec vec, Vec arg, SDPatternOperator op,
13571357
string name, bits<32> simdop> {
1358-
defm "" : SIMDConvert<vec, arg, op, name, simdop, [HasHalfPrecision]>;
1358+
defm "" : SIMDConvert<vec, arg, op, name, simdop, [HasFP16]>;
13591359
}
13601360

13611361
// Floating point to integer with saturation: trunc_sat
@@ -1532,7 +1532,7 @@ multiclass SIMDMADD<Vec vec, bits<32> simdopA, bits<32> simdopS, list<Predicate>
15321532

15331533
defm "" : SIMDMADD<F32x4, 0x105, 0x106, [HasRelaxedSIMD]>;
15341534
defm "" : SIMDMADD<F64x2, 0x107, 0x108, [HasRelaxedSIMD]>;
1535-
defm "" : SIMDMADD<F16x8, 0x146, 0x147, [HasHalfPrecision]>;
1535+
defm "" : SIMDMADD<F16x8, 0x146, 0x147, [HasFP16]>;
15361536

15371537
//===----------------------------------------------------------------------===//
15381538
// Laneselect

‎llvm/lib/Target/WebAssembly/WebAssemblySubtarget.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -43,7 +43,7 @@ class WebAssemblySubtarget final : public WebAssemblyGenSubtargetInfo {
4343
bool HasBulkMemory = false;
4444
bool HasExceptionHandling = false;
4545
bool HasExtendedConst = false;
46-
bool HasHalfPrecision = false;
46+
bool HasFP16 = false;
4747
bool HasMultiMemory = false;
4848
bool HasMultivalue = false;
4949
bool HasMutableGlobals = false;
@@ -96,7 +96,7 @@ class WebAssemblySubtarget final : public WebAssemblyGenSubtargetInfo {
9696
bool hasBulkMemory() const { return HasBulkMemory; }
9797
bool hasExceptionHandling() const { return HasExceptionHandling; }
9898
bool hasExtendedConst() const { return HasExtendedConst; }
99-
bool hasHalfPrecision() const { return HasHalfPrecision; }
99+
bool hasFP16() const { return HasFP16; }
100100
bool hasMultiMemory() const { return HasMultiMemory; }
101101
bool hasMultivalue() const { return HasMultivalue; }
102102
bool hasMutableGlobals() const { return HasMutableGlobals; }

‎llvm/test/CodeGen/WebAssembly/half-precision.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
1-
; RUN: llc < %s --mtriple=wasm32-unknown-unknown -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+half-precision,+simd128 | FileCheck %s
2-
; RUN: llc < %s --mtriple=wasm64-unknown-unknown -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+half-precision,+simd128 | FileCheck %s
1+
; RUN: llc < %s --mtriple=wasm32-unknown-unknown -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+fp16,+simd128 | FileCheck %s
2+
; RUN: llc < %s --mtriple=wasm64-unknown-unknown -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+fp16,+simd128 | FileCheck %s
33

44
declare float @llvm.wasm.loadf32.f16(ptr)
55
declare void @llvm.wasm.storef16.f32(float, ptr)

‎llvm/test/CodeGen/WebAssembly/offset.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
; RUN: llc < %s -asm-verbose=false -wasm-disable-explicit-locals -wasm-keep-registers -disable-wasm-fallthrough-return-opt -mattr=+half-precision | FileCheck %s
1+
; RUN: llc < %s -asm-verbose=false -wasm-disable-explicit-locals -wasm-keep-registers -disable-wasm-fallthrough-return-opt -mattr=+fp16 | FileCheck %s
22

33
; Test constant load and store address offsets.
44

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