fixup! fixup! [GlobalISel] Refactor extractParts()

Author: chuongg3

llvm/include/llvm/CodeGen/GlobalISel/Utils.h

@@ -262,7 +262,7 @@ bool extractParts(Register Reg, LLT RegTy, LLT MainTy, LLT &LeftoverTy,
                   MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI);
 
 /// Version which handles irregular sub-vector splits.
-void extractVectorParts(Register Reg, unsigned NumElst,
+void extractVectorParts(Register Reg, unsigned NumElts,
                         SmallVectorImpl<Register> &VRegs,
                         MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI);
 

llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp

@@ -4893,7 +4893,7 @@ LegalizerHelper::fewerElementsVectorSeqReductions(MachineInstr &MI,
 
   SmallVector<Register> SplitSrcs;
   unsigned NumParts = SrcTy.getNumElements();
-  extractParts(SrcReg, NarrowTy, NumParts, SplitSrcs);
+  extractParts(SrcReg, NarrowTy, NumParts, SplitSrcs, MIRBuilder, MRI);
   Register Acc = ScalarReg;
   for (unsigned i = 0; i < NumParts; i++)
     Acc = MIRBuilder.buildInstr(ScalarOpc, {NarrowTy}, {Acc, SplitSrcs[i]})

llvm/lib/CodeGen/GlobalISel/Utils.cpp

@@ -507,6 +507,10 @@ bool llvm::extractParts(Register Reg, LLT RegTy, LLT MainTy, LLT &LeftoverTy,
   }
 
   // Try to use unmerge for irregular vector split where possible
+  // For example when splitting a <6 x i32> into <4 x i32> with <2 x i32>
+  // leftover, it becomes:
+  //  <2 x i32> %2, <2 x i32>%3, <2 x i32> %4 = G_UNMERGE_VALUE <6 x i32> %1
+  //  <4 x i32> %5 = G_CONCAT_VECTOR <2 x i32> %2, <2 x i32> %3
   if (RegTy.isVector() && MainTy.isVector()) {
     unsigned RegNumElts = RegTy.getNumElements();
     unsigned MainNumElts = MainTy.getNumElements();