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SROA: Enhance speculateSelectInstLoads
Allow the folding even if there is an intervening bitcast. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D106667
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3 files changed

+66
-17
lines changed

3 files changed

+66
-17
lines changed

llvm/lib/Transforms/Scalar/SROA.cpp

Lines changed: 26 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1330,14 +1330,21 @@ static void speculatePHINodeLoads(PHINode &PN) {
13301330
/// %V = select i1 %cond, i32 %V1, i32 %V2
13311331
///
13321332
/// We can do this to a select if its only uses are loads and if the operand
1333-
/// to the select can be loaded unconditionally.
1333+
/// to the select can be loaded unconditionally. If found an intervening bitcast
1334+
/// with a single use of the load, allow the promotion.
13341335
static bool isSafeSelectToSpeculate(SelectInst &SI) {
13351336
Value *TValue = SI.getTrueValue();
13361337
Value *FValue = SI.getFalseValue();
13371338
const DataLayout &DL = SI.getModule()->getDataLayout();
13381339

13391340
for (User *U : SI.users()) {
1340-
LoadInst *LI = dyn_cast<LoadInst>(U);
1341+
LoadInst *LI;
1342+
BitCastInst *BC = dyn_cast<BitCastInst>(U);
1343+
if (BC && BC->hasOneUse())
1344+
LI = dyn_cast<LoadInst>(*BC->user_begin());
1345+
else
1346+
LI = dyn_cast<LoadInst>(U);
1347+
13411348
if (!LI || !LI->isSimple())
13421349
return false;
13431350

@@ -1363,10 +1370,24 @@ static void speculateSelectInstLoads(SelectInst &SI) {
13631370
Value *FV = SI.getFalseValue();
13641371
// Replace the loads of the select with a select of two loads.
13651372
while (!SI.use_empty()) {
1366-
LoadInst *LI = cast<LoadInst>(SI.user_back());
1373+
LoadInst *LI;
1374+
BitCastInst *BC = dyn_cast<BitCastInst>(SI.user_back());
1375+
if (BC) {
1376+
assert(BC->hasOneUse() && "Bitcast should have a single use.");
1377+
LI = cast<LoadInst>(BC->user_back());
1378+
} else {
1379+
LI = cast<LoadInst>(SI.user_back());
1380+
}
1381+
13671382
assert(LI->isSimple() && "We only speculate simple loads");
13681383

13691384
IRB.SetInsertPoint(LI);
1385+
if (BC) {
1386+
// Cast the operands to bitcast's target type.
1387+
TV = IRB.CreateBitCast(TV, BC->getType(), TV->getName() + ".sroa.cast");
1388+
FV = IRB.CreateBitCast(FV, BC->getType(), FV->getName() + ".sroa.cast");
1389+
}
1390+
13701391
LoadInst *TL = IRB.CreateLoad(LI->getType(), TV,
13711392
LI->getName() + ".sroa.speculate.load.true");
13721393
LoadInst *FL = IRB.CreateLoad(LI->getType(), FV,
@@ -1390,6 +1411,8 @@ static void speculateSelectInstLoads(SelectInst &SI) {
13901411
LLVM_DEBUG(dbgs() << " speculated to: " << *V << "\n");
13911412
LI->replaceAllUsesWith(V);
13921413
LI->eraseFromParent();
1414+
if (BC)
1415+
BC->eraseFromParent();
13931416
}
13941417
SI.eraseFromParent();
13951418
}

llvm/test/Transforms/SROA/phi-and-select.ll

Lines changed: 5 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -60,23 +60,14 @@ entry:
6060
ret i32 %result
6161
}
6262

63-
; If bitcast isn't considered a safe phi/select use, the alloca
64-
; remains as an array.
65-
; FIXME: Why isn't this identical to test2?
6663
define float @test2_bitcast() {
6764
; CHECK-LABEL: @test2_bitcast(
6865
; CHECK-NEXT: entry:
69-
; CHECK-NEXT: [[A_SROA_0:%.*]] = alloca i32, align 4
70-
; CHECK-NEXT: [[A_SROA_3:%.*]] = alloca i32, align 4
71-
; CHECK-NEXT: store i32 0, i32* [[A_SROA_0]], align 4
72-
; CHECK-NEXT: store i32 1, i32* [[A_SROA_3]], align 4
73-
; CHECK-NEXT: [[A_SROA_0_0_A_SROA_0_0_V0:%.*]] = load i32, i32* [[A_SROA_0]], align 4
74-
; CHECK-NEXT: [[A_SROA_3_0_A_SROA_3_4_V1:%.*]] = load i32, i32* [[A_SROA_3]], align 4
75-
; CHECK-NEXT: [[COND:%.*]] = icmp sle i32 [[A_SROA_0_0_A_SROA_0_0_V0]], [[A_SROA_3_0_A_SROA_3_4_V1]]
76-
; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[COND]], i32* [[A_SROA_3]], i32* [[A_SROA_0]]
77-
; CHECK-NEXT: [[SELECT_BC:%.*]] = bitcast i32* [[SELECT]] to float*
78-
; CHECK-NEXT: [[RESULT:%.*]] = load float, float* [[SELECT_BC]], align 4
79-
; CHECK-NEXT: ret float [[RESULT]]
66+
; CHECK-NEXT: [[COND:%.*]] = icmp sle i32 0, 1
67+
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32 1 to float
68+
; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32 0 to float
69+
; CHECK-NEXT: [[RESULT_SROA_SPECULATED:%.*]] = select i1 [[COND]], float [[TMP0]], float [[TMP1]]
70+
; CHECK-NEXT: ret float [[RESULT_SROA_SPECULATED]]
8071
;
8172
entry:
8273
%a = alloca [2 x i32]
Lines changed: 35 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,35 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2+
; RUN: opt -S -sroa < %s | FileCheck %s
3+
4+
%st.half = type { half }
5+
6+
; Allow speculateSelectInstLoads to fold load and select
7+
; even if there is an intervening bitcast.
8+
define <2 x i16> @test_load_bitcast_select(i1 %cond1, i1 %cond2) {
9+
; CHECK-LABEL: @test_load_bitcast_select(
10+
; CHECK-NEXT: [[TMP1:%.*]] = bitcast half 0xHFFFF to i16
11+
; CHECK-NEXT: [[TMP2:%.*]] = bitcast half 0xH0000 to i16
12+
; CHECK-NEXT: [[LD1_SROA_SPECULATED:%.*]] = select i1 [[COND1:%.*]], i16 [[TMP1]], i16 [[TMP2]]
13+
; CHECK-NEXT: [[V1:%.*]] = insertelement <2 x i16> undef, i16 [[LD1_SROA_SPECULATED]], i32 0
14+
; CHECK-NEXT: [[TMP3:%.*]] = bitcast half 0xHFFFF to i16
15+
; CHECK-NEXT: [[TMP4:%.*]] = bitcast half 0xH0000 to i16
16+
; CHECK-NEXT: [[LD2_SROA_SPECULATED:%.*]] = select i1 [[COND2:%.*]], i16 [[TMP3]], i16 [[TMP4]]
17+
; CHECK-NEXT: [[V2:%.*]] = insertelement <2 x i16> [[V1]], i16 [[LD2_SROA_SPECULATED]], i32 1
18+
; CHECK-NEXT: ret <2 x i16> [[V2]]
19+
;
20+
%true = alloca half, align 2
21+
%false = alloca half, align 2
22+
store half 0xHFFFF, half* %true, align 2
23+
store half 0xH0000, half* %false, align 2
24+
%false.cast = bitcast half* %false to %st.half*
25+
%true.cast = bitcast half* %true to %st.half*
26+
%sel1 = select i1 %cond1, %st.half* %true.cast, %st.half* %false.cast
27+
%cast1 = bitcast %st.half* %sel1 to i16*
28+
%ld1 = load i16, i16* %cast1, align 2
29+
%v1 = insertelement <2 x i16> undef, i16 %ld1, i32 0
30+
%sel2 = select i1 %cond2, %st.half* %true.cast, %st.half* %false.cast
31+
%cast2 = bitcast %st.half* %sel2 to i16*
32+
%ld2 = load i16, i16* %cast2, align 2
33+
%v2 = insertelement <2 x i16> %v1, i16 %ld2, i32 1
34+
ret <2 x i16> %v2
35+
}

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