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[X86] LowerSELECTWithCmpZero - without CMOV, fold "SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2))"
Use xor-bitselect pattern to avoid branching when selecting between 2 constants
1 parent 058964d commit ffeef75

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4 files changed

+117
-139
lines changed

4 files changed

+117
-139
lines changed

‎llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -24104,6 +24104,15 @@ static SDValue LowerSELECTWithCmpZero(SDValue CmpVal, SDValue LHS, SDValue RHS,
2410424104
if (isNullConstant(LHS) && isAllOnesConstant(RHS))
2410524105
return SplatLSB();
2410624106

24107+
// SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2))
24108+
if (!Subtarget.canUseCMOV() && isa<ConstantSDNode>(LHS) &&
24109+
isa<ConstantSDNode>(RHS)) {
24110+
SDValue Mask = SplatLSB();
24111+
SDValue Diff = DAG.getNode(ISD::XOR, DL, VT, LHS, RHS);
24112+
SDValue Flip = DAG.getNode(ISD::AND, DL, VT, Mask, Diff);
24113+
return DAG.getNode(ISD::XOR, DL, VT, LHS, Flip);
24114+
}
24115+
2410724116
SDValue Src1, Src2;
2410824117
auto isIdentityPattern = [&]() {
2410924118
switch (RHS.getOpcode()) {

‎llvm/test/CodeGen/X86/cmov-promotion.ll

Lines changed: 61 additions & 76 deletions
Original file line numberDiff line numberDiff line change
@@ -14,12 +14,11 @@ define i16 @cmov_zpromotion_8_to_16(i1 %c) {
1414
;
1515
; NO_CMOV-LABEL: cmov_zpromotion_8_to_16:
1616
; NO_CMOV: # %bb.0:
17-
; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
18-
; NO_CMOV-NEXT: movl $117, %eax
19-
; NO_CMOV-NEXT: jne .LBB0_2
20-
; NO_CMOV-NEXT: # %bb.1:
21-
; NO_CMOV-NEXT: movl $237, %eax
22-
; NO_CMOV-NEXT: .LBB0_2:
17+
; NO_CMOV-NEXT: movzbl {{[0-9]+}}(%esp), %eax
18+
; NO_CMOV-NEXT: andl $1, %eax
19+
; NO_CMOV-NEXT: negl %eax
20+
; NO_CMOV-NEXT: andl $152, %eax
21+
; NO_CMOV-NEXT: xorl $237, %eax
2322
; NO_CMOV-NEXT: # kill: def $ax killed $ax killed $eax
2423
; NO_CMOV-NEXT: retl
2524
%t0 = select i1 %c, i8 117, i8 -19
@@ -38,12 +37,11 @@ define i32 @cmov_zpromotion_8_to_32(i1 %c) {
3837
;
3938
; NO_CMOV-LABEL: cmov_zpromotion_8_to_32:
4039
; NO_CMOV: # %bb.0:
41-
; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
42-
; NO_CMOV-NEXT: movl $126, %eax
43-
; NO_CMOV-NEXT: jne .LBB1_2
44-
; NO_CMOV-NEXT: # %bb.1:
45-
; NO_CMOV-NEXT: movl $255, %eax
46-
; NO_CMOV-NEXT: .LBB1_2:
40+
; NO_CMOV-NEXT: movzbl {{[0-9]+}}(%esp), %eax
41+
; NO_CMOV-NEXT: andl $1, %eax
42+
; NO_CMOV-NEXT: negl %eax
43+
; NO_CMOV-NEXT: andl $129, %eax
44+
; NO_CMOV-NEXT: xorl $255, %eax
4745
; NO_CMOV-NEXT: retl
4846
%t0 = select i1 %c, i8 12414, i8 -1
4947
%ret = zext i8 %t0 to i32
@@ -61,12 +59,11 @@ define i64 @cmov_zpromotion_8_to_64(i1 %c) {
6159
;
6260
; NO_CMOV-LABEL: cmov_zpromotion_8_to_64:
6361
; NO_CMOV: # %bb.0:
64-
; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
65-
; NO_CMOV-NEXT: movl $126, %eax
66-
; NO_CMOV-NEXT: jne .LBB2_2
67-
; NO_CMOV-NEXT: # %bb.1:
68-
; NO_CMOV-NEXT: movl $255, %eax
69-
; NO_CMOV-NEXT: .LBB2_2:
62+
; NO_CMOV-NEXT: movzbl {{[0-9]+}}(%esp), %eax
63+
; NO_CMOV-NEXT: andl $1, %eax
64+
; NO_CMOV-NEXT: negl %eax
65+
; NO_CMOV-NEXT: andl $129, %eax
66+
; NO_CMOV-NEXT: xorl $255, %eax
7067
; NO_CMOV-NEXT: xorl %edx, %edx
7168
; NO_CMOV-NEXT: retl
7269
%t0 = select i1 %c, i8 12414, i8 -1
@@ -85,12 +82,11 @@ define i32 @cmov_zpromotion_16_to_32(i1 %c) {
8582
;
8683
; NO_CMOV-LABEL: cmov_zpromotion_16_to_32:
8784
; NO_CMOV: # %bb.0:
88-
; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
89-
; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E
90-
; NO_CMOV-NEXT: jne .LBB3_2
91-
; NO_CMOV-NEXT: # %bb.1:
92-
; NO_CMOV-NEXT: movl $65535, %eax # imm = 0xFFFF
93-
; NO_CMOV-NEXT: .LBB3_2:
85+
; NO_CMOV-NEXT: movzbl {{[0-9]+}}(%esp), %eax
86+
; NO_CMOV-NEXT: andl $1, %eax
87+
; NO_CMOV-NEXT: negl %eax
88+
; NO_CMOV-NEXT: andl $53121, %eax # imm = 0xCF81
89+
; NO_CMOV-NEXT: xorl $65535, %eax # imm = 0xFFFF
9490
; NO_CMOV-NEXT: retl
9591
%t0 = select i1 %c, i16 12414, i16 -1
9692
%ret = zext i16 %t0 to i32
@@ -108,12 +104,11 @@ define i64 @cmov_zpromotion_16_to_64(i1 %c) {
108104
;
109105
; NO_CMOV-LABEL: cmov_zpromotion_16_to_64:
110106
; NO_CMOV: # %bb.0:
111-
; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
112-
; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E
113-
; NO_CMOV-NEXT: jne .LBB4_2
114-
; NO_CMOV-NEXT: # %bb.1:
115-
; NO_CMOV-NEXT: movl $65535, %eax # imm = 0xFFFF
116-
; NO_CMOV-NEXT: .LBB4_2:
107+
; NO_CMOV-NEXT: movzbl {{[0-9]+}}(%esp), %eax
108+
; NO_CMOV-NEXT: andl $1, %eax
109+
; NO_CMOV-NEXT: negl %eax
110+
; NO_CMOV-NEXT: andl $53121, %eax # imm = 0xCF81
111+
; NO_CMOV-NEXT: xorl $65535, %eax # imm = 0xFFFF
117112
; NO_CMOV-NEXT: xorl %edx, %edx
118113
; NO_CMOV-NEXT: retl
119114
%t0 = select i1 %c, i16 12414, i16 -1
@@ -132,12 +127,11 @@ define i64 @cmov_zpromotion_32_to_64(i1 %c) {
132127
;
133128
; NO_CMOV-LABEL: cmov_zpromotion_32_to_64:
134129
; NO_CMOV: # %bb.0:
135-
; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
136-
; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E
137-
; NO_CMOV-NEXT: jne .LBB5_2
138-
; NO_CMOV-NEXT: # %bb.1:
139-
; NO_CMOV-NEXT: movl $43107, %eax # imm = 0xA863
140-
; NO_CMOV-NEXT: .LBB5_2:
130+
; NO_CMOV-NEXT: movzbl {{[0-9]+}}(%esp), %eax
131+
; NO_CMOV-NEXT: andl $1, %eax
132+
; NO_CMOV-NEXT: negl %eax
133+
; NO_CMOV-NEXT: andl $38941, %eax # imm = 0x981D
134+
; NO_CMOV-NEXT: xorl $43107, %eax # imm = 0xA863
141135
; NO_CMOV-NEXT: xorl %edx, %edx
142136
; NO_CMOV-NEXT: retl
143137
%t0 = select i1 %c, i32 12414, i32 43107
@@ -157,12 +151,11 @@ define i16 @cmov_spromotion_8_to_16(i1 %c) {
157151
;
158152
; NO_CMOV-LABEL: cmov_spromotion_8_to_16:
159153
; NO_CMOV: # %bb.0:
160-
; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
161-
; NO_CMOV-NEXT: movl $117, %eax
162-
; NO_CMOV-NEXT: jne .LBB6_2
163-
; NO_CMOV-NEXT: # %bb.1:
164-
; NO_CMOV-NEXT: movl $65517, %eax # imm = 0xFFED
165-
; NO_CMOV-NEXT: .LBB6_2:
154+
; NO_CMOV-NEXT: movzbl {{[0-9]+}}(%esp), %eax
155+
; NO_CMOV-NEXT: andl $1, %eax
156+
; NO_CMOV-NEXT: negl %eax
157+
; NO_CMOV-NEXT: andl $-104, %eax
158+
; NO_CMOV-NEXT: xorl $65517, %eax # imm = 0xFFED
166159
; NO_CMOV-NEXT: # kill: def $ax killed $ax killed $eax
167160
; NO_CMOV-NEXT: retl
168161
%t0 = select i1 %c, i8 117, i8 -19
@@ -181,12 +174,11 @@ define i32 @cmov_spromotion_8_to_32(i1 %c) {
181174
;
182175
; NO_CMOV-LABEL: cmov_spromotion_8_to_32:
183176
; NO_CMOV: # %bb.0:
184-
; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
185-
; NO_CMOV-NEXT: movl $126, %eax
186-
; NO_CMOV-NEXT: jne .LBB7_2
187-
; NO_CMOV-NEXT: # %bb.1:
188-
; NO_CMOV-NEXT: movl $99, %eax
189-
; NO_CMOV-NEXT: .LBB7_2:
177+
; NO_CMOV-NEXT: movzbl {{[0-9]+}}(%esp), %eax
178+
; NO_CMOV-NEXT: andl $1, %eax
179+
; NO_CMOV-NEXT: negl %eax
180+
; NO_CMOV-NEXT: andl $29, %eax
181+
; NO_CMOV-NEXT: xorl $99, %eax
190182
; NO_CMOV-NEXT: retl
191183
%t0 = select i1 %c, i8 12414, i8 43107
192184
%ret = sext i8 %t0 to i32
@@ -204,12 +196,11 @@ define i64 @cmov_spromotion_8_to_64(i1 %c) {
204196
;
205197
; NO_CMOV-LABEL: cmov_spromotion_8_to_64:
206198
; NO_CMOV: # %bb.0:
207-
; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
208-
; NO_CMOV-NEXT: movl $126, %eax
209-
; NO_CMOV-NEXT: jne .LBB8_2
210-
; NO_CMOV-NEXT: # %bb.1:
211-
; NO_CMOV-NEXT: movl $99, %eax
212-
; NO_CMOV-NEXT: .LBB8_2:
199+
; NO_CMOV-NEXT: movzbl {{[0-9]+}}(%esp), %eax
200+
; NO_CMOV-NEXT: andl $1, %eax
201+
; NO_CMOV-NEXT: negl %eax
202+
; NO_CMOV-NEXT: andl $29, %eax
203+
; NO_CMOV-NEXT: xorl $99, %eax
213204
; NO_CMOV-NEXT: xorl %edx, %edx
214205
; NO_CMOV-NEXT: retl
215206
%t0 = select i1 %c, i8 12414, i8 43107
@@ -228,12 +219,11 @@ define i32 @cmov_spromotion_16_to_32(i1 %c) {
228219
;
229220
; NO_CMOV-LABEL: cmov_spromotion_16_to_32:
230221
; NO_CMOV: # %bb.0:
231-
; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
232-
; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E
233-
; NO_CMOV-NEXT: jne .LBB9_2
234-
; NO_CMOV-NEXT: # %bb.1:
235-
; NO_CMOV-NEXT: movl $-22429, %eax # imm = 0xA863
236-
; NO_CMOV-NEXT: .LBB9_2:
222+
; NO_CMOV-NEXT: movzbl {{[0-9]+}}(%esp), %eax
223+
; NO_CMOV-NEXT: andl $1, %eax
224+
; NO_CMOV-NEXT: negl %eax
225+
; NO_CMOV-NEXT: andl $-26595, %eax # imm = 0x981D
226+
; NO_CMOV-NEXT: xorl $-22429, %eax # imm = 0xA863
237227
; NO_CMOV-NEXT: retl
238228
%t0 = select i1 %c, i16 12414, i16 43107
239229
%ret = sext i16 %t0 to i32
@@ -251,16 +241,12 @@ define i64 @cmov_spromotion_16_to_64(i1 %c) {
251241
;
252242
; NO_CMOV-LABEL: cmov_spromotion_16_to_64:
253243
; NO_CMOV: # %bb.0:
254-
; NO_CMOV-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
255-
; NO_CMOV-NEXT: andb $1, %cl
256-
; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E
257-
; NO_CMOV-NEXT: jne .LBB10_2
258-
; NO_CMOV-NEXT: # %bb.1:
259-
; NO_CMOV-NEXT: movl $-22429, %eax # imm = 0xA863
260-
; NO_CMOV-NEXT: .LBB10_2:
261-
; NO_CMOV-NEXT: xorl %edx, %edx
262-
; NO_CMOV-NEXT: cmpb $1, %cl
263-
; NO_CMOV-NEXT: sbbl %edx, %edx
244+
; NO_CMOV-NEXT: movzbl {{[0-9]+}}(%esp), %eax
245+
; NO_CMOV-NEXT: andl $1, %eax
246+
; NO_CMOV-NEXT: leal -1(%eax), %edx
247+
; NO_CMOV-NEXT: negl %eax
248+
; NO_CMOV-NEXT: andl $-26595, %eax # imm = 0x981D
249+
; NO_CMOV-NEXT: xorl $-22429, %eax # imm = 0xA863
264250
; NO_CMOV-NEXT: retl
265251
%t0 = select i1 %c, i16 12414, i16 43107
266252
%ret = sext i16 %t0 to i64
@@ -278,12 +264,11 @@ define i64 @cmov_spromotion_32_to_64(i1 %c) {
278264
;
279265
; NO_CMOV-LABEL: cmov_spromotion_32_to_64:
280266
; NO_CMOV: # %bb.0:
281-
; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
282-
; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E
283-
; NO_CMOV-NEXT: jne .LBB11_2
284-
; NO_CMOV-NEXT: # %bb.1:
285-
; NO_CMOV-NEXT: movl $43107, %eax # imm = 0xA863
286-
; NO_CMOV-NEXT: .LBB11_2:
267+
; NO_CMOV-NEXT: movzbl {{[0-9]+}}(%esp), %eax
268+
; NO_CMOV-NEXT: andl $1, %eax
269+
; NO_CMOV-NEXT: negl %eax
270+
; NO_CMOV-NEXT: andl $38941, %eax # imm = 0x981D
271+
; NO_CMOV-NEXT: xorl $43107, %eax # imm = 0xA863
287272
; NO_CMOV-NEXT: xorl %edx, %edx
288273
; NO_CMOV-NEXT: retl
289274
%t0 = select i1 %c, i32 12414, i32 43107

‎llvm/test/CodeGen/X86/select.ll

Lines changed: 8 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -106,18 +106,16 @@ define i32 @test2() nounwind {
106106
; MCU-LABEL: test2:
107107
; MCU: # %bb.0: # %entry
108108
; MCU-NEXT: calll return_false@PLT
109-
; MCU-NEXT: xorl %ecx, %ecx
110-
; MCU-NEXT: testb $1, %al
111-
; MCU-NEXT: jne .LBB1_2
112-
; MCU-NEXT: # %bb.1: # %entry
113-
; MCU-NEXT: movl $-3840, %ecx # imm = 0xF100
114-
; MCU-NEXT: .LBB1_2: # %entry
115-
; MCU-NEXT: cmpl $32768, %ecx # imm = 0x8000
116-
; MCU-NEXT: jge .LBB1_3
117-
; MCU-NEXT: # %bb.4: # %bb91
109+
; MCU-NEXT: movzbl %al, %eax
110+
; MCU-NEXT: andl $1, %eax
111+
; MCU-NEXT: decl %eax
112+
; MCU-NEXT: andl $-3840, %eax # imm = 0xF100
113+
; MCU-NEXT: cmpl $32768, %eax # imm = 0x8000
114+
; MCU-NEXT: jge .LBB1_1
115+
; MCU-NEXT: # %bb.2: # %bb91
118116
; MCU-NEXT: xorl %eax, %eax
119117
; MCU-NEXT: retl
120-
; MCU-NEXT: .LBB1_3: # %bb90
118+
; MCU-NEXT: .LBB1_1: # %bb90
121119
entry:
122120
%tmp73 = tail call i1 @return_false()
123121
%g.0 = select i1 %tmp73, i16 0, i16 -480

‎llvm/test/CodeGen/X86/select_const.ll

Lines changed: 39 additions & 53 deletions
Original file line numberDiff line numberDiff line change
@@ -668,12 +668,11 @@ define i8 @sel_67_neg125(i32 %x) {
668668
define i32 @select_C1_C2(i1 %cond) {
669669
; X86-LABEL: select_C1_C2:
670670
; X86: # %bb.0:
671-
; X86-NEXT: testb $1, {{[0-9]+}}(%esp)
672-
; X86-NEXT: movl $421, %eax # imm = 0x1A5
673-
; X86-NEXT: jne .LBB32_2
674-
; X86-NEXT: # %bb.1:
675-
; X86-NEXT: movl $42, %eax
676-
; X86-NEXT: .LBB32_2:
671+
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
672+
; X86-NEXT: andl $1, %eax
673+
; X86-NEXT: negl %eax
674+
; X86-NEXT: andl $399, %eax # imm = 0x18F
675+
; X86-NEXT: xorl $42, %eax
677676
; X86-NEXT: retl
678677
;
679678
; X64-LABEL: select_C1_C2:
@@ -712,12 +711,11 @@ define i32 @select_C1_C2_zeroext(i1 zeroext %cond) {
712711
define i32 @select_C1_C2_signext(i1 signext %cond) {
713712
; X86-LABEL: select_C1_C2_signext:
714713
; X86: # %bb.0:
715-
; X86-NEXT: testb $1, {{[0-9]+}}(%esp)
716-
; X86-NEXT: movl $421, %eax # imm = 0x1A5
717-
; X86-NEXT: jne .LBB34_2
718-
; X86-NEXT: # %bb.1:
719-
; X86-NEXT: movl $42, %eax
720-
; X86-NEXT: .LBB34_2:
714+
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
715+
; X86-NEXT: andl $1, %eax
716+
; X86-NEXT: negl %eax
717+
; X86-NEXT: andl $399, %eax # imm = 0x18F
718+
; X86-NEXT: xorl $42, %eax
721719
; X86-NEXT: retl
722720
;
723721
; X64-LABEL: select_C1_C2_signext:
@@ -800,44 +798,34 @@ define i64 @select_2_or_inc(i64 %x) {
800798
define <4 x i32> @sel_constants_add_constant_vec(i1 %cond) {
801799
; X86-LABEL: sel_constants_add_constant_vec:
802800
; X86: # %bb.0:
803-
; X86-NEXT: pushl %ebx
804-
; X86-NEXT: .cfi_def_cfa_offset 8
805801
; X86-NEXT: pushl %edi
806-
; X86-NEXT: .cfi_def_cfa_offset 12
802+
; X86-NEXT: .cfi_def_cfa_offset 8
807803
; X86-NEXT: pushl %esi
808-
; X86-NEXT: .cfi_def_cfa_offset 16
809-
; X86-NEXT: .cfi_offset %esi, -16
810-
; X86-NEXT: .cfi_offset %edi, -12
811-
; X86-NEXT: .cfi_offset %ebx, -8
812-
; X86-NEXT: testb $1, {{[0-9]+}}(%esp)
813-
; X86-NEXT: movl $-3, %ecx
814-
; X86-NEXT: jne .LBB37_2
815-
; X86-NEXT: # %bb.1:
816-
; X86-NEXT: movl $12, %ecx
817-
; X86-NEXT: .LBB37_2:
804+
; X86-NEXT: .cfi_def_cfa_offset 12
805+
; X86-NEXT: .cfi_offset %esi, -12
806+
; X86-NEXT: .cfi_offset %edi, -8
818807
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
819-
; X86-NEXT: movl $4, %esi
820-
; X86-NEXT: movl $4, %edx
821-
; X86-NEXT: jne .LBB37_4
822-
; X86-NEXT: # %bb.3:
823-
; X86-NEXT: movl $14, %edx
824-
; X86-NEXT: .LBB37_4:
825-
; X86-NEXT: jne .LBB37_6
826-
; X86-NEXT: # %bb.5:
827-
; X86-NEXT: movl $15, %esi
828-
; X86-NEXT: .LBB37_6:
829-
; X86-NEXT: setne %bl
830-
; X86-NEXT: movzbl %bl, %edi
831-
; X86-NEXT: addl $13, %edi
832-
; X86-NEXT: movl %esi, 12(%eax)
833-
; X86-NEXT: movl %edx, 8(%eax)
834-
; X86-NEXT: movl %edi, 4(%eax)
835-
; X86-NEXT: movl %ecx, (%eax)
808+
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
809+
; X86-NEXT: andl $1, %ecx
810+
; X86-NEXT: negl %ecx
811+
; X86-NEXT: movl %ecx, %edx
812+
; X86-NEXT: andl $-15, %edx
813+
; X86-NEXT: orl $12, %edx
814+
; X86-NEXT: movl %ecx, %esi
815+
; X86-NEXT: andl $3, %esi
816+
; X86-NEXT: xorl $13, %esi
817+
; X86-NEXT: movl %ecx, %edi
818+
; X86-NEXT: andl $10, %edi
819+
; X86-NEXT: xorl $14, %edi
820+
; X86-NEXT: andl $11, %ecx
821+
; X86-NEXT: xorl $15, %ecx
822+
; X86-NEXT: movl %ecx, 12(%eax)
823+
; X86-NEXT: movl %edi, 8(%eax)
824+
; X86-NEXT: movl %esi, 4(%eax)
825+
; X86-NEXT: movl %edx, (%eax)
836826
; X86-NEXT: popl %esi
837-
; X86-NEXT: .cfi_def_cfa_offset 12
838-
; X86-NEXT: popl %edi
839827
; X86-NEXT: .cfi_def_cfa_offset 8
840-
; X86-NEXT: popl %ebx
828+
; X86-NEXT: popl %edi
841829
; X86-NEXT: .cfi_def_cfa_offset 4
842830
; X86-NEXT: retl $4
843831
;
@@ -907,14 +895,12 @@ define i64 @opaque_constant(i1 %cond, i64 %x) {
907895
; X86-NEXT: .cfi_offset %ebx, -8
908896
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
909897
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
910-
; X86-NEXT: testb $1, {{[0-9]+}}(%esp)
911-
; X86-NEXT: movl $-4, %eax
912-
; X86-NEXT: jne .LBB39_2
913-
; X86-NEXT: # %bb.1:
914-
; X86-NEXT: movl $23, %eax
915-
; X86-NEXT: .LBB39_2:
916-
; X86-NEXT: setne %dl
917-
; X86-NEXT: movzbl %dl, %edx
898+
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
899+
; X86-NEXT: movl %eax, %edx
900+
; X86-NEXT: andl $1, %edx
901+
; X86-NEXT: negl %edx
902+
; X86-NEXT: andl $1, %edx
903+
; X86-NEXT: decl %eax
918904
; X86-NEXT: andl $1, %eax
919905
; X86-NEXT: xorl $1, %esi
920906
; X86-NEXT: xorl $1, %ecx

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