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[DAG] Add SDPatternMatch::m_VSelect #100758

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Merged
merged 1 commit into from
Jul 29, 2024
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[DAG] Add SDPatternMatch::m_VSelect #100758

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6 changes: 6 additions & 0 deletions llvm/include/llvm/CodeGen/SDPatternMatch.h
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Original file line number Diff line number Diff line change
Expand Up @@ -496,6 +496,12 @@ m_Select(const T0_P &Cond, const T1_P &T, const T2_P &F) {
return TernaryOpc_match<T0_P, T1_P, T2_P>(ISD::SELECT, Cond, T, F);
}

template <typename T0_P, typename T1_P, typename T2_P>
inline TernaryOpc_match<T0_P, T1_P, T2_P>
m_VSelect(const T0_P &Cond, const T1_P &T, const T2_P &F) {
return TernaryOpc_match<T0_P, T1_P, T2_P>(ISD::VSELECT, Cond, T, F);
}

// === Binary operations ===
template <typename LHS_P, typename RHS_P, bool Commutable = false,
bool ExcludeChain = false>
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9 changes: 9 additions & 0 deletions llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
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Expand Up @@ -137,6 +137,11 @@ TEST_F(SelectionDAGPatternMatchTest, matchTernaryOp) {
SDValue F = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 5, Int1VT);
SDValue Select = DAG->getSelect(DL, MVT::i1, Cond, T, F);

auto VInt32VT = EVT::getVectorVT(Context, Int32VT, 4);
SDValue V1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 6, VInt32VT);
SDValue V2 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 7, VInt32VT);
SDValue VSelect = DAG->getNode(ISD::VSELECT, DL, VInt32VT, Cond, V1, V2);

using namespace SDPatternMatch;
ISD::CondCode CC;
EXPECT_TRUE(sd_match(ICMP_UGT, m_SetCC(m_Value(), m_Value(),
Expand Down Expand Up @@ -166,6 +171,10 @@ TEST_F(SelectionDAGPatternMatchTest, matchTernaryOp) {
Select, m_Select(m_Specific(Cond), m_Specific(F), m_Specific(T))));
EXPECT_FALSE(sd_match(ICMP_EQ01, m_Select(m_Specific(Op0), m_Specific(Op1),
m_SpecificCondCode(ISD::SETEQ))));
EXPECT_TRUE(sd_match(
VSelect, m_VSelect(m_Specific(Cond), m_Specific(V1), m_Specific(V2))));
EXPECT_FALSE(sd_match(
Select, m_VSelect(m_Specific(Cond), m_Specific(V1), m_Specific(V2))));
}

TEST_F(SelectionDAGPatternMatchTest, matchBinaryOp) {
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