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[SLP] The order of store chains needs to consider the size of the values. #101810

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Merged
merged 1 commit into from
Aug 7, 2024
Merged

[SLP] The order of store chains needs to consider the size of the values. #101810

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6 changes: 6 additions & 0 deletions llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -19123,6 +19123,12 @@ bool SLPVectorizerPass::vectorizeStoreChains(BoUpSLP &R) {
if (V->getPointerOperandType()->getTypeID() >
V2->getPointerOperandType()->getTypeID())
return false;
if (V->getValueOperand()->getType()->getScalarSizeInBits() <
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I think you also need to update the checks in AreCompatibleStores lambda

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done

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I would suggest to compare getTypeID() rather than size here

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getTypeID has been compared above, but with the same TypeID, such as IntegerTyID, which can have different sizes.

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No, getTypeID() above compared for pointer operands, which worked for typed pointers. You need to use getTypeID for value operand types

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Did you miss lines 19114 to 19122, which compare the value operand types?

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Ah, yes. Then there is a question, of why it did not work, because it should work correctly for compatible types

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i8 and i64 are not compatible types, but they have the same Type ID, IntegerTyID

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Ah, yes, missed it.

V2->getValueOperand()->getType()->getScalarSizeInBits())
return true;
if (V->getValueOperand()->getType()->getScalarSizeInBits() >
V2->getValueOperand()->getType()->getScalarSizeInBits())
return false;
// UndefValues are compatible with all other values.
if (isa<UndefValue>(V->getValueOperand()) ||
isa<UndefValue>(V2->getValueOperand()))
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10 changes: 1 addition & 9 deletions llvm/test/Transforms/SLPVectorizer/X86/stores_mix_sizes.ll
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Expand Up @@ -5,17 +5,9 @@ define void @test(ptr %p) {
; CHECK-SAME: ptr [[P:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[IDX1:%.*]] = getelementptr i8, ptr [[P]], i64 1
; CHECK-NEXT: store i8 0, ptr [[IDX1]], align 4
; CHECK-NEXT: [[IDX_64_9:%.*]] = getelementptr i64, ptr [[P]], i64 9
; CHECK-NEXT: store i64 1, ptr [[IDX_64_9]], align 8
; CHECK-NEXT: [[IDX2:%.*]] = getelementptr i8, ptr [[P]], i64 2
; CHECK-NEXT: store <4 x i8> zeroinitializer, ptr [[IDX2]], align 4
; CHECK-NEXT: [[IDX6:%.*]] = getelementptr i8, ptr [[P]], i64 6
; CHECK-NEXT: store i8 0, ptr [[IDX6]], align 4
; CHECK-NEXT: [[IDX7:%.*]] = getelementptr i8, ptr [[P]], i64 7
; CHECK-NEXT: store i8 0, ptr [[IDX7]], align 4
; CHECK-NEXT: [[IDX8:%.*]] = getelementptr i8, ptr [[P]], i64 8
; CHECK-NEXT: store i8 0, ptr [[IDX8]], align 4
; CHECK-NEXT: store <8 x i8> zeroinitializer, ptr [[IDX1]], align 4
; CHECK-NEXT: ret void
;
entry:
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