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[AMDGPU] Set hasSideEffects=0 for SALU psuedos #134487

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merged 2 commits into from
Apr 11, 2025

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amansharma612
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Fixes #128685

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github-actions bot commented Apr 5, 2025

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llvmbot commented Apr 5, 2025

@llvm/pr-subscribers-backend-amdgpu

Author: None (amansharma612)

Changes

Fixes #128685


Full diff: https://github.com/llvm/llvm-project/pull/134487.diff

2 Files Affected:

  • (modified) llvm/lib/Target/AMDGPU/SIInstructions.td (+12-4)
  • (modified) llvm/lib/Target/AMDGPU/SOPInstructions.td (+6-2)
diff --git a/llvm/lib/Target/AMDGPU/SIInstructions.td b/llvm/lib/Target/AMDGPU/SIInstructions.td
index 9051db0c01ed1..e78a29e36b358 100644
--- a/llvm/lib/Target/AMDGPU/SIInstructions.td
+++ b/llvm/lib/Target/AMDGPU/SIInstructions.td
@@ -340,19 +340,27 @@ def S_SUB_U64_PSEUDO : SPseudoInstSI <
 
 def S_ADD_CO_PSEUDO : SPseudoInstSI <
   (outs SReg_32:$sdst, SSrc_i1:$scc_out), (ins SSrc_b32:$src0, SSrc_b32:$src1, SSrc_i1:$scc_in)
->;
+>{
+    let hasSideEffects = 0;
+}
 
 def S_SUB_CO_PSEUDO : SPseudoInstSI <
   (outs SReg_32:$sdst, SSrc_i1:$scc_out), (ins SSrc_b32:$src0, SSrc_b32:$src1, SSrc_i1:$scc_in)
->;
+>{
+    let hasSideEffects = 0;
+}
 
 def S_UADDO_PSEUDO : SPseudoInstSI <
   (outs SReg_32:$sdst, SSrc_i1:$scc_out), (ins SSrc_b32:$src0, SSrc_b32:$src1)
->;
+>{
+    let hasSideEffects = 0;
+}
 
 def S_USUBO_PSEUDO : SPseudoInstSI <
   (outs SReg_32:$sdst, SSrc_i1:$scc_out), (ins SSrc_b32:$src0, SSrc_b32:$src1)
->;
+>{
+    let hasSideEffects = 0;
+}
 
 let OtherPredicates = [HasShaderCyclesHiLoRegisters] in
 def GET_SHADERCYCLESHILO : SPseudoInstSI<
diff --git a/llvm/lib/Target/AMDGPU/SOPInstructions.td b/llvm/lib/Target/AMDGPU/SOPInstructions.td
index 73f4655f735a2..be63bc4a745eb 100644
--- a/llvm/lib/Target/AMDGPU/SOPInstructions.td
+++ b/llvm/lib/Target/AMDGPU/SOPInstructions.td
@@ -665,12 +665,16 @@ let SubtargetPredicate = isGFX12Plus in {
   // The higher 32-bits of the inputs contain the sign extension bits.
   def S_MUL_I64_I32_PSEUDO : SPseudoInstSI <
     (outs SReg_64:$sdst), (ins SSrc_b64:$src0, SSrc_b64:$src1)
-  >;
+  >{
+      let hasSideEffects = 0;
+  }
 
   // The higher 32-bits of the inputs are zero.
   def S_MUL_U64_U32_PSEUDO : SPseudoInstSI <
     (outs SReg_64:$sdst), (ins SSrc_b64:$src0, SSrc_b64:$src1)
-  >;
+  >{
+    let hasSideEffects = 0;
+  }
 
 } // End SubtargetPredicate = isGFX12Plus
 

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I'm curious why no side effects is not the default and this needs to be explicit for these pseudos in particular? Is there any motivating test/example where this impacts scheduling or some other optimization?

@kerbowa kerbowa requested a review from jayfoad April 5, 2025 21:48
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arsenm commented Apr 7, 2025

I'm curious why no side effects is not the default

Wrong by default is a horrible design mistake LLVM has repeated in far too many places. This is the correct default

@@ -340,19 +340,27 @@ def S_SUB_U64_PSEUDO : SPseudoInstSI <

def S_ADD_CO_PSEUDO : SPseudoInstSI <
(outs SReg_32:$sdst, SSrc_i1:$scc_out), (ins SSrc_b32:$src0, SSrc_b32:$src1, SSrc_i1:$scc_in)
>;
>{
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Move >{ to previous line

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nit: use let hasSideEffects=0 in { .. } to avoid repetition?

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arsenm commented Apr 7, 2025

Is there any motivating test/example where this impacts scheduling or some other optimization?

I doubt it, these are a SelectionDAG hack more than anything and expand immediately. It doesn't hurt to correct this though

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Regression test mul.ll fails with the intended changes.

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arsenm commented Apr 7, 2025

Regression test mul.ll fails with the intended changes.

Probably just need to run update_llc_test_checks

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jayfoad commented Apr 7, 2025

Could also do this for S_INVERSE_BALLOT_U32/64

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arsenm commented Apr 10, 2025

LGTM but could also do this for the inverse ballots

@amansharma612
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LGTM but could also do this for the inverse ballots

@arsenm I've added the changes for inverse ballots already

@@ -231,7 +231,7 @@ def EXIT_STRICT_WQM : SPseudoInstSI <(outs SReg_1:$sdst), (ins SReg_1:$src0)> {
let mayStore = 0;
}

let usesCustomInserter = 1 in {
let usesCustomInserter = 1, hasSideEffects = 0 in {
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Update the corresponding // End comment below.

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LGTM, thanks.

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jayfoad commented Apr 10, 2025

mansharma612 force-pushed the salusideeffects branch from 926a934 to baddce9 3 minutes ago

To fix things in your PR it is almost always better to push an extra commit, instead of modifying your commit and force-pushing it. Force-pushing makes it harder for reviewers to see what you have changed.

@arsenm arsenm merged commit 976c37e into llvm:main Apr 11, 2025
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var-const pushed a commit to ldionne/llvm-project that referenced this pull request Apr 17, 2025
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AMDGPU SALU pseudos should not have side effects
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