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[X86][MC] Support Enc/Dec for EGPR for promoted CET instruction #76023

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Merged
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Dec 22, 2023
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[X86][MC] Support Enc/Dec for EGPR for promoted CET instruction #76023

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[X86][MC] Support Enc/Dec for EGPR for promoted CET instruction
XinWang10 Dec 20, 2023
0745344
use EVEX, NoCD8 instead
XinWang10 Dec 21, 2023
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17 changes: 17 additions & 0 deletions llvm/lib/Target/X86/X86InstrSystem.td
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Expand Up @@ -520,6 +520,7 @@ let SchedRW = [WriteSystem] in {
} // Defs SSP
} // Uses SSP

let Predicates = [NoEGPR] in {
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How about other CET instuctions like RDSSPD? It has GPR operand too. It looks to me strange the symmetry instuction doesn't gain APX promotion.

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RDSSPD is not promoted. I guess it's probably b/c it's used by intrinsic and the dest reg is RAX in most cases.

def WRSSD : I<0xF6, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src),
"wrssd\t{$src, $dst|$dst, $src}",
[(int_x86_wrssd GR32:$src, addr:$dst)]>, T8PS;
Expand All @@ -532,6 +533,22 @@ let SchedRW = [WriteSystem] in {
def WRUSSQ : RI<0xF5, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src),
"wrussq\t{$src, $dst|$dst, $src}",
[(int_x86_wrussq GR64:$src, addr:$dst)]>, T8PD;
}

let Predicates = [HasEGPR, In64BitMode] in {
def WRSSD_EVEX : I<0x66, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src),
"wrssd\t{$src, $dst|$dst, $src}",
[(int_x86_wrssd GR32:$src, addr:$dst)]>, EVEX, NoCD8, T_MAP4PS;
def WRSSQ_EVEX : RI<0x66, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src),
"wrssq\t{$src, $dst|$dst, $src}",
[(int_x86_wrssq GR64:$src, addr:$dst)]>, EVEX, NoCD8, T_MAP4PS;
def WRUSSD_EVEX : I<0x65, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src),
"wrussd\t{$src, $dst|$dst, $src}",
[(int_x86_wrussd GR32:$src, addr:$dst)]>, EVEX, NoCD8, T_MAP4PD;
def WRUSSQ_EVEX : RI<0x65, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src),
"wrussq\t{$src, $dst|$dst, $src}",
[(int_x86_wrussq GR64:$src, addr:$dst)]>, EVEX, NoCD8, T_MAP4PD;
}

let Defs = [SSP] in {
let Uses = [SSP] in {
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6 changes: 6 additions & 0 deletions llvm/test/MC/Disassembler/X86/apx/wrssd.txt
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@@ -0,0 +1,6 @@
# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL

# ATT: wrssd %r18d, 291(%r28,%r29,4)
# INTEL: wrssd dword ptr [r28 + 4*r29 + 291], r18d
0x62,0x8c,0x78,0x08,0x66,0x94,0xac,0x23,0x01,0x00,0x00
6 changes: 6 additions & 0 deletions llvm/test/MC/Disassembler/X86/apx/wrssq.txt
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@@ -0,0 +1,6 @@
# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
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Could you merge the test WRUSSD with WRUSSQ? D, Q here is kind of a suffix here.

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They are listed as different instructions in document.


# ATT: wrssq %r19, 291(%r28,%r29,4)
# INTEL: wrssq qword ptr [r28 + 4*r29 + 291], r19
0x62,0x8c,0xf8,0x08,0x66,0x9c,0xac,0x23,0x01,0x00,0x00
6 changes: 6 additions & 0 deletions llvm/test/MC/Disassembler/X86/apx/wrussd.txt
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@@ -0,0 +1,6 @@
# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL

# ATT: wrussd %r18d, 291(%r28,%r29,4)
# INTEL: wrussd dword ptr [r28 + 4*r29 + 291], r18d
0x62,0x8c,0x79,0x08,0x65,0x94,0xac,0x23,0x01,0x00,0x00
6 changes: 6 additions & 0 deletions llvm/test/MC/Disassembler/X86/apx/wrussq.txt
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@@ -0,0 +1,6 @@
# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL

# ATT: wrussq %r19, 291(%r28,%r29,4)
# INTEL: wrussq qword ptr [r28 + 4*r29 + 291], r19
0x62,0x8c,0xf9,0x08,0x65,0x9c,0xac,0x23,0x01,0x00,0x00
8 changes: 8 additions & 0 deletions llvm/test/MC/X86/apx/wrssd-att.s
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# RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
# RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR

# ERROR-COUNT-1: error:
# ERROR-NOT: error:
# CHECK: wrssd %r18d, 291(%r28,%r29,4)
# CHECK: encoding: [0x62,0x8c,0x78,0x08,0x66,0x94,0xac,0x23,0x01,0x00,0x00]
wrssd %r18d, 291(%r28,%r29,4)
5 changes: 5 additions & 0 deletions llvm/test/MC/X86/apx/wrssd-intel.s
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@@ -0,0 +1,5 @@
# RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s

# CHECK: wrssd dword ptr [r28 + 4*r29 + 291], r18d
# CHECK: encoding: [0x62,0x8c,0x78,0x08,0x66,0x94,0xac,0x23,0x01,0x00,0x00]
wrssd dword ptr [r28 + 4*r29 + 291], r18d
8 changes: 8 additions & 0 deletions llvm/test/MC/X86/apx/wrssq-att.s
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@@ -0,0 +1,8 @@
# RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
# RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR

# ERROR-COUNT-1: error:
# ERROR-NOT: error:
# CHECK: wrssq %r19, 291(%r28,%r29,4)
# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0x66,0x9c,0xac,0x23,0x01,0x00,0x00]
wrssq %r19, 291(%r28,%r29,4)
5 changes: 5 additions & 0 deletions llvm/test/MC/X86/apx/wrssq-intel.s
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@@ -0,0 +1,5 @@
# RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s

# CHECK: wrssq qword ptr [r28 + 4*r29 + 291], r19
# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0x66,0x9c,0xac,0x23,0x01,0x00,0x00]
wrssq qword ptr [r28 + 4*r29 + 291], r19
8 changes: 8 additions & 0 deletions llvm/test/MC/X86/apx/wrussd-att.s
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Original file line number Diff line number Diff line change
@@ -0,0 +1,8 @@
# RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
# RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR

# ERROR-COUNT-1: error:
# ERROR-NOT: error:
# CHECK: wrussd %r18d, 291(%r28,%r29,4)
# CHECK: encoding: [0x62,0x8c,0x79,0x08,0x65,0x94,0xac,0x23,0x01,0x00,0x00]
wrussd %r18d, 291(%r28,%r29,4)
5 changes: 5 additions & 0 deletions llvm/test/MC/X86/apx/wrussd-intel.s
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Original file line number Diff line number Diff line change
@@ -0,0 +1,5 @@
# RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s

# CHECK: wrussd dword ptr [r28 + 4*r29 + 291], r18d
# CHECK: encoding: [0x62,0x8c,0x79,0x08,0x65,0x94,0xac,0x23,0x01,0x00,0x00]
wrussd dword ptr [r28 + 4*r29 + 291], r18d
8 changes: 8 additions & 0 deletions llvm/test/MC/X86/apx/wrussq-att.s
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Original file line number Diff line number Diff line change
@@ -0,0 +1,8 @@
# RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
# RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR

# ERROR-COUNT-1: error:
# ERROR-NOT: error:
# CHECK: wrussq %r19, 291(%r28,%r29,4)
# CHECK: encoding: [0x62,0x8c,0xf9,0x08,0x65,0x9c,0xac,0x23,0x01,0x00,0x00]
wrussq %r19, 291(%r28,%r29,4)
5 changes: 5 additions & 0 deletions llvm/test/MC/X86/apx/wrussq-intel.s
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Original file line number Diff line number Diff line change
@@ -0,0 +1,5 @@
# RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s

# CHECK: wrussq qword ptr [r28 + 4*r29 + 291], r19
# CHECK: encoding: [0x62,0x8c,0xf9,0x08,0x65,0x9c,0xac,0x23,0x01,0x00,0x00]
wrussq qword ptr [r28 + 4*r29 + 291], r19