Skip to content

[mlir][openacc] Add private/reduction in legalize data pass #80882

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 1 commit into from
Feb 6, 2024
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
29 changes: 24 additions & 5 deletions mlir/lib/Dialect/OpenACC/Transforms/LegalizeData.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -24,10 +24,10 @@ using namespace mlir;

namespace {

template <typename Op>
static void collectAndReplaceInRegion(Op &op, bool hostToDevice) {
llvm::SmallVector<std::pair<Value, Value>> values;
for (auto operand : op.getDataClauseOperands()) {
static void collectPtrs(mlir::ValueRange operands,
llvm::SmallVector<std::pair<Value, Value>> &values,
bool hostToDevice) {
for (auto operand : operands) {
Value varPtr = acc::getVarPtr(operand.getDefiningOp());
Value accPtr = acc::getAccPtr(operand.getDefiningOp());
if (varPtr && accPtr) {
Expand All @@ -37,6 +37,23 @@ static void collectAndReplaceInRegion(Op &op, bool hostToDevice) {
values.push_back({accPtr, varPtr});
}
}
}

template <typename Op>
static void collectAndReplaceInRegion(Op &op, bool hostToDevice) {
llvm::SmallVector<std::pair<Value, Value>> values;

if constexpr (std::is_same_v<Op, acc::LoopOp>) {
collectPtrs(op.getReductionOperands(), values, hostToDevice);
collectPtrs(op.getPrivateOperands(), values, hostToDevice);
} else {
collectPtrs(op.getDataClauseOperands(), values, hostToDevice);
if constexpr (!std::is_same_v<Op, acc::KernelsOp>) {
collectPtrs(op.getReductionOperands(), values, hostToDevice);
collectPtrs(op.getGangPrivateOperands(), values, hostToDevice);
collectPtrs(op.getGangFirstPrivateOperands(), values, hostToDevice);
}
}

for (auto p : values)
replaceAllUsesInRegionWith(std::get<0>(p), std::get<1>(p), op.getRegion());
Expand All @@ -50,7 +67,7 @@ struct LegalizeDataInRegion
bool replaceHostVsDevice = this->hostToDevice.getValue();

funcOp.walk([&](Operation *op) {
if (!isa<ACC_COMPUTE_CONSTRUCT_OPS>(*op))
if (!isa<ACC_COMPUTE_CONSTRUCT_OPS>(*op) && !isa<acc::LoopOp>(*op))
return;

if (auto parallelOp = dyn_cast<acc::ParallelOp>(*op)) {
Expand All @@ -59,6 +76,8 @@ struct LegalizeDataInRegion
collectAndReplaceInRegion(serialOp, replaceHostVsDevice);
} else if (auto kernelsOp = dyn_cast<acc::KernelsOp>(*op)) {
collectAndReplaceInRegion(kernelsOp, replaceHostVsDevice);
} else if (auto loopOp = dyn_cast<acc::LoopOp>(*op)) {
collectAndReplaceInRegion(loopOp, replaceHostVsDevice);
}
});
}
Expand Down
114 changes: 114 additions & 0 deletions mlir/test/Dialect/OpenACC/legalize-data.mlir
Original file line number Diff line number Diff line change
Expand Up @@ -86,3 +86,117 @@ func.func @test(%a: memref<10xf32>) {
// CHECK: }
// CHECK: acc.yield
// CHECK: }

// -----

acc.private.recipe @privatization_memref_10_f32 : memref<10xf32> init {
^bb0(%arg0: memref<10xf32>):
%0 = memref.alloc() : memref<10xf32>
acc.yield %0 : memref<10xf32>
} destroy {
^bb0(%arg0: memref<10xf32>):
memref.dealloc %arg0 : memref<10xf32>
acc.terminator
}

func.func @test(%a: memref<10xf32>) {
%lb = arith.constant 0 : index
%st = arith.constant 1 : index
%c10 = arith.constant 10 : index
%p1 = acc.private varPtr(%a : memref<10xf32>) -> memref<10xf32>
acc.parallel private(@privatization_memref_10_f32 -> %p1 : memref<10xf32>) {
acc.loop control(%i : index) = (%lb : index) to (%c10 : index) step (%st : index) {
%ci = memref.load %a[%i] : memref<10xf32>
acc.yield
}
acc.yield
}
return
}

// CHECK: func.func @test
// CHECK-SAME: (%[[A:.*]]: memref<10xf32>)
// CHECK: %[[PRIVATE:.*]] = acc.private varPtr(%[[A]] : memref<10xf32>) -> memref<10xf32>
// CHECK: acc.parallel private(@privatization_memref_10_f32 -> %[[PRIVATE]] : memref<10xf32>) {
// CHECK: acc.loop control(%[[I:.*]] : index) = (%{{.*}} : index) to (%{{.*}} : index) step (%{{.*}} : index) {
// DEVICE: %{{.*}} = memref.load %[[PRIVATE:.*]][%[[I]]] : memref<10xf32>
// CHECK: acc.yield
// CHECK: }
// CHECK: acc.yield
// CHECK: }

// -----

acc.private.recipe @privatization_memref_10_f32 : memref<10xf32> init {
^bb0(%arg0: memref<10xf32>):
%0 = memref.alloc() : memref<10xf32>
acc.yield %0 : memref<10xf32>
} destroy {
^bb0(%arg0: memref<10xf32>):
memref.dealloc %arg0 : memref<10xf32>
acc.terminator
}

func.func @test(%a: memref<10xf32>) {
%lb = arith.constant 0 : index
%st = arith.constant 1 : index
%c10 = arith.constant 10 : index
%p1 = acc.private varPtr(%a : memref<10xf32>) -> memref<10xf32>
acc.parallel {
acc.loop private(@privatization_memref_10_f32 -> %p1 : memref<10xf32>) control(%i : index) = (%lb : index) to (%c10 : index) step (%st : index) {
%ci = memref.load %a[%i] : memref<10xf32>
acc.yield
}
acc.yield
}
return
}

// CHECK: func.func @test
// CHECK-SAME: (%[[A:.*]]: memref<10xf32>)
// CHECK: %[[PRIVATE:.*]] = acc.private varPtr(%[[A]] : memref<10xf32>) -> memref<10xf32>
// CHECK: acc.parallel {
// CHECK: acc.loop private(@privatization_memref_10_f32 -> %[[PRIVATE]] : memref<10xf32>) control(%[[I:.*]] : index) = (%{{.*}} : index) to (%{{.*}} : index) step (%{{.*}} : index) {
// DEVICE: %{{.*}} = memref.load %[[PRIVATE:.*]][%[[I]]] : memref<10xf32>
// CHECK: acc.yield
// CHECK: }
// CHECK: acc.yield
// CHECK: }

// -----

acc.private.recipe @privatization_memref_10_f32 : memref<10xf32> init {
^bb0(%arg0: memref<10xf32>):
%0 = memref.alloc() : memref<10xf32>
acc.yield %0 : memref<10xf32>
} destroy {
^bb0(%arg0: memref<10xf32>):
memref.dealloc %arg0 : memref<10xf32>
acc.terminator
}

func.func @test(%a: memref<10xf32>) {
%lb = arith.constant 0 : index
%st = arith.constant 1 : index
%c10 = arith.constant 10 : index
%p1 = acc.private varPtr(%a : memref<10xf32>) -> memref<10xf32>
acc.serial private(@privatization_memref_10_f32 -> %p1 : memref<10xf32>) {
acc.loop control(%i : index) = (%lb : index) to (%c10 : index) step (%st : index) {
%ci = memref.load %a[%i] : memref<10xf32>
acc.yield
}
acc.yield
}
return
}

// CHECK: func.func @test
// CHECK-SAME: (%[[A:.*]]: memref<10xf32>)
// CHECK: %[[PRIVATE:.*]] = acc.private varPtr(%[[A]] : memref<10xf32>) -> memref<10xf32>
// CHECK: acc.serial private(@privatization_memref_10_f32 -> %[[PRIVATE]] : memref<10xf32>) {
// CHECK: acc.loop control(%[[I:.*]] : index) = (%{{.*}} : index) to (%{{.*}} : index) step (%{{.*}} : index) {
// DEVICE: %{{.*}} = memref.load %[[PRIVATE:.*]][%[[I]]] : memref<10xf32>
// CHECK: acc.yield
// CHECK: }
// CHECK: acc.yield
// CHECK: }