Skip to content

[RISCV] Move matchRegisterNameHelper into the RISCVAsmParser and remove IsRVE argument. NFC #85172

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 1 commit into from
Mar 14, 2024
Merged
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
25 changes: 13 additions & 12 deletions llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -107,6 +107,7 @@ class RISCVAsmParser : public MCTargetAsmParser {
uint64_t &ErrorInfo,
bool MatchingInlineAsm) override;

MCRegister matchRegisterNameHelper(StringRef Name) const;
bool parseRegister(MCRegister &Reg, SMLoc &StartLoc, SMLoc &EndLoc) override;
ParseStatus tryParseRegister(MCRegister &Reg, SMLoc &StartLoc,
SMLoc &EndLoc) override;
Expand Down Expand Up @@ -1630,7 +1631,7 @@ bool RISCVAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
// alternative ABI names), setting RegNo to the matching register. Upon
// failure, returns a non-valid MCRegister. If IsRVE, then registers x16-x31
// will be rejected.
static MCRegister matchRegisterNameHelper(bool IsRVE, StringRef Name) {
MCRegister RISCVAsmParser::matchRegisterNameHelper(StringRef Name) const {
MCRegister Reg = MatchRegisterName(Name);
// The 16-/32- and 64-bit FPRs have the same asm name. Check that the initial
// match always matches the 64-bit variant, and not the 16/32-bit one.
Expand All @@ -1641,7 +1642,7 @@ static MCRegister matchRegisterNameHelper(bool IsRVE, StringRef Name) {
static_assert(RISCV::F0_D < RISCV::F0_F, "FPR matching must be updated");
if (!Reg)
Reg = MatchRegisterAltName(Name);
if (IsRVE && Reg >= RISCV::X16 && Reg <= RISCV::X31)
if (isRVE() && Reg >= RISCV::X16 && Reg <= RISCV::X31)
Reg = RISCV::NoRegister;
return Reg;
}
Expand All @@ -1660,7 +1661,7 @@ ParseStatus RISCVAsmParser::tryParseRegister(MCRegister &Reg, SMLoc &StartLoc,
EndLoc = Tok.getEndLoc();
StringRef Name = getLexer().getTok().getIdentifier();

Reg = matchRegisterNameHelper(isRVE(), Name);
Reg = matchRegisterNameHelper(Name);
if (!Reg)
return ParseStatus::NoMatch;

Expand Down Expand Up @@ -1693,7 +1694,7 @@ ParseStatus RISCVAsmParser::parseRegister(OperandVector &Operands,
return ParseStatus::NoMatch;
case AsmToken::Identifier:
StringRef Name = getLexer().getTok().getIdentifier();
MCRegister RegNo = matchRegisterNameHelper(isRVE(), Name);
MCRegister RegNo = matchRegisterNameHelper(Name);

if (!RegNo) {
if (HadParens)
Expand Down Expand Up @@ -2232,7 +2233,7 @@ ParseStatus RISCVAsmParser::parseMaskReg(OperandVector &Operands) {
StringRef Name = getLexer().getTok().getIdentifier();
if (!Name.consume_back(".t"))
return Error(getLoc(), "expected '.t' suffix");
MCRegister RegNo = matchRegisterNameHelper(isRVE(), Name);
MCRegister RegNo = matchRegisterNameHelper(Name);

if (!RegNo)
return ParseStatus::NoMatch;
Expand All @@ -2250,7 +2251,7 @@ ParseStatus RISCVAsmParser::parseGPRAsFPR(OperandVector &Operands) {
return ParseStatus::NoMatch;

StringRef Name = getLexer().getTok().getIdentifier();
MCRegister RegNo = matchRegisterNameHelper(isRVE(), Name);
MCRegister RegNo = matchRegisterNameHelper(Name);

if (!RegNo)
return ParseStatus::NoMatch;
Expand Down Expand Up @@ -2281,7 +2282,7 @@ ParseStatus RISCVAsmParser::parseGPRPair(OperandVector &Operands,
return ParseStatus::NoMatch;

StringRef Name = getLexer().getTok().getIdentifier();
MCRegister RegNo = matchRegisterNameHelper(isRVE(), Name);
MCRegister RegNo = matchRegisterNameHelper(Name);

if (!RegNo)
return ParseStatus::NoMatch;
Expand Down Expand Up @@ -2461,7 +2462,7 @@ ParseStatus RISCVAsmParser::parseRegReg(OperandVector &Operands) {
return ParseStatus::NoMatch;

StringRef RegName = getLexer().getTok().getIdentifier();
MCRegister Reg = matchRegisterNameHelper(isRVE(), RegName);
MCRegister Reg = matchRegisterNameHelper(RegName);
if (!Reg)
return Error(getLoc(), "invalid register");
getLexer().Lex();
Expand All @@ -2473,7 +2474,7 @@ ParseStatus RISCVAsmParser::parseRegReg(OperandVector &Operands) {
return Error(getLoc(), "expected register");

StringRef Reg2Name = getLexer().getTok().getIdentifier();
MCRegister Reg2 = matchRegisterNameHelper(isRVE(), Reg2Name);
MCRegister Reg2 = matchRegisterNameHelper(Reg2Name);
if (!Reg2)
return Error(getLoc(), "invalid register");
getLexer().Lex();
Expand All @@ -2500,7 +2501,7 @@ ParseStatus RISCVAsmParser::parseReglist(OperandVector &Operands) {
return Error(getLoc(), "register list must start from 'ra' or 'x1'");

StringRef RegName = getLexer().getTok().getIdentifier();
MCRegister RegStart = matchRegisterNameHelper(IsEABI, RegName);
MCRegister RegStart = matchRegisterNameHelper(RegName);
MCRegister RegEnd;
if (RegStart != RISCV::X1)
return Error(getLoc(), "register list must start from 'ra' or 'x1'");
Expand All @@ -2511,7 +2512,7 @@ ParseStatus RISCVAsmParser::parseReglist(OperandVector &Operands) {
if (getLexer().isNot(AsmToken::Identifier))
return Error(getLoc(), "invalid register");
StringRef RegName = getLexer().getTok().getIdentifier();
RegStart = matchRegisterNameHelper(IsEABI, RegName);
RegStart = matchRegisterNameHelper(RegName);
if (!RegStart)
return Error(getLoc(), "invalid register");
if (RegStart != RISCV::X8)
Expand All @@ -2524,7 +2525,7 @@ ParseStatus RISCVAsmParser::parseReglist(OperandVector &Operands) {
if (parseOptionalToken(AsmToken::Minus)) {
StringRef EndName = getLexer().getTok().getIdentifier();
// FIXME: the register mapping and checks of EABI is wrong
RegEnd = matchRegisterNameHelper(IsEABI, EndName);
RegEnd = matchRegisterNameHelper(EndName);
if (!RegEnd)
return Error(getLoc(), "invalid register");
if (IsEABI && RegEnd != RISCV::X9)
Expand Down