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[LV] Account for vp_merge in out of loop EVL reductions in legacy cost model
In llvm#101641, support for out of loop reductions with EVL tail folding was added by transforming selects to vp_merges in transformRecipestoEVLRecipes. Whilst the select was previously free, the vp_merge wasn't and incurs a cost on RISC-V with the VPlan cost model. But this diverged from the legacy cost model and caused the "VPlan cost model and legacy cost model disagreed" assertion to trigger when building 502.gcc_r from SPEC CPU 2017. Neither the select nor vp_merge recipes from the VPlan exist in the underlying instructions, so I thought it would make the most sense to fix this by adding the cost to the underlying phi instruction in getInstructionCost. It's worth noting that on RISC-V this vp_merge won't actually generate any instructions because the mask is all true, and will be folded away. So we should update the cost model at some point to reflect that.
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llvm/lib/Transforms/Vectorize/LoopVectorize.cpp

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@@ -6567,6 +6567,16 @@ LoopVectorizationCostModel::getInstructionCost(Instruction *I,
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CmpInst::BAD_ICMP_PREDICATE, CostKind);
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}
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// When tail folding with EVL, if the phi is part of an out of loop reduction
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// then it will be transformed into a wide vp_merge.
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if (VF.isVector() && foldTailWithEVL() &&
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Legal->getReductionVars().contains(Phi) && !isInLoopReduction(Phi)) {
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IntrinsicCostAttributes ICA(
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Intrinsic::vp_merge, ToVectorTy(Phi->getType(), VF),
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{ToVectorTy(Type::getInt1Ty(Phi->getContext()), VF)});
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return TTI.getIntrinsicInstrCost(ICA, CostKind);
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}
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return TTI.getCFInstrCost(Instruction::PHI, CostKind);
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}
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case Instruction::UDiv:

llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction-cost.ll

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@@ -10,7 +10,7 @@
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; RUN: --check-prefix=NO-EVL
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; EVL: Cost of 2 for VF vscale x 4: WIDEN-INTRINSIC vp<%{{.+}}> = call llvm.vp.merge(ir<true>, ir<%add>, ir<%rdx>, vp<%{{.+}}>)
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; EVL: LV: Found an estimated cost of 0 for VF vscale x 4 For instruction: %rdx = phi i32 [ %start, %entry ], [ %add, %for.body ]
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; EVL: LV: Found an estimated cost of 2 for VF vscale x 4 For instruction: %rdx = phi i32 [ %start, %entry ], [ %add, %for.body ]
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; NO-EVL: Cost of 0 for VF vscale x 4: EMIT vp<%{{.+}}> = select vp<%active.lane.mask>, ir<%add>, ir<%rdx>
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; NO-EVL: LV: Found an estimated cost of 0 for VF vscale x 4 For instruction: %rdx = phi i32 [ %start, %entry ], [ %add, %for.body ]

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