Merge pull request ARMmbed#14689 from MubeenHCLite/HighSpeed_Async_SPI_limitation

Information on Asynchronous SPI limitation on High Speeds

Author: adbridge

targets/TARGET_STM/README.md

@@ -406,6 +406,17 @@ Option is also to define your own `HAL_ETH_MspInit` function,
 you then have to add **USE_USER_DEFINED_HAL_ETH_MSPINIT** macro.
 
 
+### Asynchronous SPI limitation
+
+The current Asynchronous SPI implementation will not be able to support high speeds (MHz Range).
+The maximum speed supported depends on
+- core operating frequency
+- depth of SPI FIFOs (if available).
+
+For application that require optimized maximum performance, the recommendation is to implement the DMA-based SPI transfer.
+The SPI DMA transfer support shall be implemented on a case-by-case based on below example
+https://github.com/ABOSTM/mbed-os/tree/I2C_SPI_DMA_IMPLEMENTATION_FOR_STM32L4
+
 
 ## Mbed OS Uncyclo pages
 

targets/TARGET_STM/stm_spi_api.c

@@ -1034,6 +1034,7 @@ static int spi_master_start_asynch_transfer(spi_t *obj, transfer_type_t transfer
 }
 
 // asynchronous API
+// DMA support for SPI is currently not supported, hence asynchronous SPI does not support high speeds(MHZ range)
 void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint)
 {
     struct spi_s *spiobj = SPI_S(obj);