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[func][spirv] Add necessary patch, pass-pipeline, and test case for new SPIR-V pipeline.
The patch has a upstream PR pending review: llvm/llvm-project#86750. The patch can be removed once the PR gets merged and LLVM version is updated. The test cases in this PR only provides lowering from func to spirv. XeGPU test cases using the full pipeline is coming as part of next PR from Dimple (drprajap).
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‎build_tools/patches/0008-Add-memref.extract_aligned_pointer_as_index-to-spirv.patch

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Upstream PR in progress: https://github.com/llvm/llvm-project/pull/86750
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diff --git a/mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp b/mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
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index 57d8e894a24b..3fc68c65de05 100644
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--- a/mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
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+++ b/mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
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@@ -306,6 +306,18 @@ public:
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}
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};
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+/// Converts memref.extract_aligned_pointer_as_index to spirv.ConvertPtrToU.
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+class ExtractAlignedPointerAsIndexOpPattern
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+ : public OpConversionPattern<memref::ExtractAlignedPointerAsIndexOp> {
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+public:
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+ using OpConversionPattern::OpConversionPattern;
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+
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+ LogicalResult
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+ matchAndRewrite(memref::ExtractAlignedPointerAsIndexOp extractOp,
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+ OpAdaptor adaptor,
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+ ConversionPatternRewriter &rewriter) const override;
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+};
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+
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} // namespace
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//===----------------------------------------------------------------------===//
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@@ -905,6 +917,20 @@ LogicalResult ReinterpretCastPattern::matchAndRewrite(
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return success();
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}
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+//===----------------------------------------------------------------------===//
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+// ExtractAlignedPointerAsIndexOp
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+//===----------------------------------------------------------------------===//
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+
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+LogicalResult ExtractAlignedPointerAsIndexOpPattern::matchAndRewrite(
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+ memref::ExtractAlignedPointerAsIndexOp extractOp, OpAdaptor adaptor,
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+ ConversionPatternRewriter &rewriter) const {
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+ auto &typeConverter = *getTypeConverter<SPIRVTypeConverter>();
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+ Type indexType = typeConverter.getIndexType();
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+ rewriter.replaceOpWithNewOp<spirv::ConvertPtrToUOp>(extractOp, indexType,
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+ adaptor.getSource());
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+ return success();
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+}
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+
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//===----------------------------------------------------------------------===//
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// Pattern population
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//===----------------------------------------------------------------------===//
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@@ -912,10 +938,11 @@ LogicalResult ReinterpretCastPattern::matchAndRewrite(
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namespace mlir {
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void populateMemRefToSPIRVPatterns(SPIRVTypeConverter &typeConverter,
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RewritePatternSet &patterns) {
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- patterns.add<AllocaOpPattern, AllocOpPattern, AtomicRMWOpPattern,
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- DeallocOpPattern, IntLoadOpPattern, IntStoreOpPattern,
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- LoadOpPattern, MemorySpaceCastOpPattern, StoreOpPattern,
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- ReinterpretCastPattern, CastPattern>(typeConverter,
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- patterns.getContext());
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+ patterns
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+ .add<AllocaOpPattern, AllocOpPattern, AtomicRMWOpPattern,
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+ DeallocOpPattern, IntLoadOpPattern, IntStoreOpPattern, LoadOpPattern,
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+ MemorySpaceCastOpPattern, StoreOpPattern, ReinterpretCastPattern,
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+ CastPattern, ExtractAlignedPointerAsIndexOpPattern>(
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+ typeConverter, patterns.getContext());
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}
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} // namespace mlir

‎test/Integration/Dialect/Func/func-to-llvm.pp

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// gpu dialect with intel intrinsic functions (func dialect) to
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// llvm dialect (for host code) and
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// spirv dialect (for device code) lowering pipeline.
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// Ready for imex runner starting from GPU dialect.
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builtin.module(
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gpu.module(convert-func-to-spirv)
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gpu.module(convert-vector-to-spirv)
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imex-convert-gpu-to-spirv{enable-vc-intrinsic=true}
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spirv.module(spirv-lower-abi-attrs
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spirv-update-vce)
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func.func(llvm-request-c-wrappers)
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serialize-spirv
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convert-vector-to-scf
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convert-gpu-to-gpux
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convert-scf-to-cf
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convert-cf-to-llvm
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convert-vector-to-llvm
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convert-index-to-llvm
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convert-arith-to-llvm
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convert-func-to-llvm
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convert-math-to-llvm
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convert-gpux-to-llvm
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convert-index-to-llvm
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expand-strided-metadata
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lower-affine
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finalize-memref-to-llvm
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reconcile-unrealized-casts)
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// End

‎test/Integration/Dialect/Func/gemm-with-func-and-intel-intrinsic.mlir

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// RUN: %python_executable %imex_runner --requires=l0-runtime -i %s --pass-pipeline-file=%p/func-to-llvm.pp \
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// RUN: --runner imex-cpu-runner -e main \
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// RUN: --entry-point-result=void \
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// RUN: --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%levelzero_runtime --filecheck
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// RUN: %python_executable %imex_runner --requires=sycl-runtime -i %s --pass-pipeline-file=%p/func-to-llvm.pp \
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// RUN: --runner imex-cpu-runner -e main \
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// RUN: --entry-point-result=void \
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// RUN: --shared-libs=%irunner_utils,%mlir_runner_utils,%mlir_c_runner_utils,%sycl_runtime --filecheck
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module @gemm attributes {gpu.container_module,
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spirv.target_env = #spirv.target_env<#spirv.vce<v1.4, [Addresses, Float16Buffer, Int64, Int16, Int8, Kernel, Linkage, Vector16, GenericPointer, Groups, Float16, Float64, AtomicFloat32AddEXT, ExpectAssumeKHR, SubgroupDispatch, VectorComputeINTEL, VectorAnyINTEL], [SPV_EXT_shader_atomic_float_add, SPV_KHR_expect_assume, SPV_INTEL_vector_compute]>, api=OpenCL, #spirv.resource_limits<>>} {
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memref.global "private" constant @__constant_8x16xf16 : memref<8x16xf16> = dense<5.000000e-01>
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memref.global "private" constant @__constant_16x16xf16 : memref<16x16xf16> = dense<1.099610e+00>
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func.func @test(%arg0: memref<8x16xf16>, %arg1: memref<16x16xf16>) -> memref<8x16xf32> attributes {llvm.emit_c_interface} {
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%c1 = arith.constant 1 : index
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%memref = gpu.alloc host_shared () : memref<8x16xf16>
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memref.copy %arg0, %memref : memref<8x16xf16> to memref<8x16xf16>
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%memref_0 = gpu.alloc host_shared () : memref<16x16xf16>
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memref.copy %arg1, %memref_0 : memref<16x16xf16> to memref<16x16xf16>
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%memref_1 = gpu.alloc host_shared () : memref<8x16xf32>
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gpu.launch_func @test_kernel::@test_kernel blocks in (%c1, %c1, %c1) threads in (%c1, %c1, %c1) args(%memref : memref<8x16xf16>, %memref_0 : memref<16x16xf16>, %memref_1 : memref<8x16xf32>)
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gpu.dealloc %memref : memref<8x16xf16>
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gpu.dealloc %memref_0 : memref<16x16xf16>
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return %memref_1 : memref<8x16xf32>
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}
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gpu.module @test_kernel {
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func.func private @llvm.genx.raw.sends2.noresult.i1.v8i32.v64i64(i8, i8, i1, i8, i8, i8, i32, i32, vector<8xi32>, vector<64xi64>) attributes{
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linkage_attributes=#spirv.linkage_attributes<
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linkage_name="llvm.genx.raw.sends2.noresult.i1.v8i32.v64i64",
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linkage_type=<Import>
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>,
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VectorComputeFunctionINTEL}
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func.func private @llvm.genx.dpas.nosrc0.v128f32.v128i32.v64i32(vector<128xi32>, vector<64xi32>, i32) -> vector<128xf32> attributes{
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linkage_attributes=#spirv.linkage_attributes<
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linkage_name="llvm.genx.dpas.nosrc0.v128f32.v128i32.v64i32",
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linkage_type=<Import>
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>,
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VectorComputeFunctionINTEL}
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func.func private @llvm.genx.raw.send2.v128i32.i1.v8i32(i8, i8, i1, i8, i8, i8, i32, i32, vector<8xi32>, vector<128xi32>) -> vector<128xi32> attributes{
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linkage_attributes=#spirv.linkage_attributes<
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linkage_name="llvm.genx.raw.send2.v128i32.i1.v8i32",
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linkage_type=<Import>
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>,
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VectorComputeFunctionINTEL}
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func.func private @llvm.genx.raw.send2.v32i64.i1.v8i32(i8, i8, i1, i8, i8, i8, i32, i32, vector<8xi32>, vector<32xi64>) -> vector<32xi64> attributes{
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linkage_attributes=#spirv.linkage_attributes<
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linkage_name="llvm.genx.raw.send2.v32i64.i1.v8i32",
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linkage_type=<Import>
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>,
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VectorComputeFunctionINTEL}
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gpu.func @test_kernel(%arg0: memref<8x16xf16>, %arg1: memref<16x16xf16>, %arg2: memref<8x16xf32>) kernel attributes {VectorComputeFunctionINTEL,spirv.entry_point_abi = #spirv.entry_point_abi<>} {
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%reinterpret_cast = memref.reinterpret_cast %arg0 to offset: [0], sizes: [128], strides: [1] : memref<8x16xf16> to memref<128xf16>
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%cst = arith.constant dense<0> : vector<4xi64>
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%intptr = memref.extract_aligned_pointer_as_index %reinterpret_cast : memref<128xf16> -> index
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%0 = arith.index_castui %intptr : index to i64
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%1 = vector.insert %0, %cst[0] : i64 into vector<4xi64>
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%2 = vector.bitcast %1 : vector<4xi64> to vector<8xi32>
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%cst_0 = arith.constant dense<0> : vector<4xi64>
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%cst_to_non_cst = arith.addi %cst_0, %cst_0 : vector<4xi64>
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%intptr_1 = memref.extract_aligned_pointer_as_index %arg1 : memref<16x16xf16> -> index
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%3 = arith.index_castui %intptr_1 : index to i64
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%4 = vector.insert %3, %cst_to_non_cst[0] : i64 into vector<4xi64>
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%5 = vector.bitcast %4 : vector<4xi64> to vector<8xi32>
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%c31_i32 = arith.constant 31 : i32
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%c15_i32 = arith.constant 15 : i32
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%c31_i32_2 = arith.constant 31 : i32
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%6 = vector.insert %c31_i32, %5 [2] : i32 into vector<8xi32>
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%7 = vector.insert %c15_i32, %6 [3] : i32 into vector<8xi32>
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%8 = vector.insert %c31_i32_2, %7 [4] : i32 into vector<8xi32>
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%c0_i32 = arith.constant 0 : i32
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%c0_i32_3 = arith.constant 0 : i32
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%9 = vector.insert %c0_i32, %8 [5] : i32 into vector<8xi32>
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%10 = vector.insert %c0_i32_3, %9 [6] : i32 into vector<8xi32>
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%c3855_i32 = arith.constant 3855 : i32
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%11 = vector.insert %c3855_i32, %10 [7] : i32 into vector<8xi32>
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%reinterpret_cast_4 = memref.reinterpret_cast %arg2 to offset: [0], sizes: [128], strides: [1] : memref<8x16xf32> to memref<128xf32>
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%cst_5_t = arith.constant dense<0> : vector<4xi64>
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%cst_5 = arith.addi %cst_5_t, %cst_5_t : vector<4xi64>
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%intptr_6 = memref.extract_aligned_pointer_as_index %reinterpret_cast_4 : memref<128xf32> -> index
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%12 = arith.index_castui %intptr_6 : index to i64
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%13 = vector.insert %12, %cst_5 [0] : i64 into vector<4xi64>
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%14 = vector.bitcast %13 : vector<4xi64> to vector<8xi32>
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%c0_i8 = arith.constant 0 : i8
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%c0_i8_7 = arith.constant 0 : i8
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%true = arith.constant true
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%c1_i8 = arith.constant 1 : i8
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%c4_i8 = arith.constant 4 : i8
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%c15_i8 = arith.constant 15 : i8
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%c0_i32_8 = arith.constant 0 : i32
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%c42133376_i32 = arith.constant 42133376 : i32
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%cst_9 = arith.constant dense<0> : vector<32xi64>
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%15 = func.call @llvm.genx.raw.send2.v32i64.i1.v8i32(%c0_i8, %c0_i8_7, %true, %c1_i8, %c4_i8, %c15_i8, %c0_i32_8, %c42133376_i32, %2, %cst_9) : (i8, i8, i1, i8, i8, i8, i32, i32, vector<8xi32>, vector<32xi64>) -> vector<32xi64>
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%16 = vector.bitcast %15 : vector<32xi64> to vector<128xf16>
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%c0_i8_10 = arith.constant 0 : i8
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%c0_i8_11 = arith.constant 0 : i8
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%true_12 = arith.constant true
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%c1_i8_13 = arith.constant 1 : i8
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%c8_i8 = arith.constant 8 : i8
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%c15_i8_14 = arith.constant 15 : i8
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%c0_i32_15 = arith.constant 0 : i32
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%c42074755_i32 = arith.constant 42074755 : i32
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%cst_16 = arith.constant dense<0> : vector<128xi32>
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%17 = func.call @llvm.genx.raw.send2.v128i32.i1.v8i32(%c0_i8_10, %c0_i8_11, %true_12, %c1_i8_13, %c8_i8, %c15_i8_14, %c0_i32_15, %c42074755_i32, %11, %cst_16) : (i8, i8, i1, i8, i8, i8, i32, i32, vector<8xi32>, vector<128xi32>) -> vector<128xi32>
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%18 = vector.bitcast %16 : vector<128xf16> to vector<64xi32>
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%c134744586_i32 = arith.constant 134744586 : i32
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%19 = func.call @llvm.genx.dpas.nosrc0.v128f32.v128i32.v64i32(%17, %18, %c134744586_i32) : (vector<128xi32>, vector<64xi32>, i32) -> vector<128xf32>
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%c0_i8_17 = arith.constant 0 : i8
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%c0_i8_18 = arith.constant 0 : i8
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%true_19 = arith.constant true
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%c1_i8_20 = arith.constant 1 : i8
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%c8_i8_21 = arith.constant 8 : i8
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%c15_i8_22 = arith.constant 15 : i8
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%c0_i32_23 = arith.constant 0 : i32
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%c33748868_i32 = arith.constant 33748868 : i32
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%20 = vector.bitcast %19 : vector<128xf32> to vector<64xi64>
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func.call @llvm.genx.raw.sends2.noresult.i1.v8i32.v64i64(%c0_i8_17, %c0_i8_18, %true_19, %c1_i8_20, %c8_i8_21, %c15_i8_22, %c0_i32_23, %c33748868_i32, %14, %20) : (i8, i8, i1, i8, i8, i8, i32, i32, vector<8xi32>, vector<64xi64>) -> ()
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gpu.return
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}
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}
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func.func @main() attributes {llvm.emit_c_interface} {
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%0 = memref.get_global @__constant_8x16xf16 : memref<8x16xf16>
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%1 = memref.get_global @__constant_16x16xf16 : memref<16x16xf16>
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%2 = call @test(%0, %1) : (memref<8x16xf16>, memref<16x16xf16>) -> memref<8x16xf32>
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%cast = memref.cast %2 : memref<8x16xf32> to memref<*xf32>
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call @printMemrefF32(%cast) : (memref<*xf32>) -> ()
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// CHECK: Unranked Memref base@ = {{(0x)?[-9a-f]*}}
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// CHECK-COUNT-128: 8.79688
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return
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}
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func.func private @printMemrefF32(memref<*xf32>) attributes {llvm.emit_c_interface}
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}

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