Merge pull request intel#742 from bb-sycl/xmain

Auto pulldown and update tc files for xmain branch on 20220307

Author: myler

.github/CODEOWNERS

@@ -27,8 +27,14 @@ SYCL/Tracing  @intel/llvm-reviewers-runtime
 SYCL/DeviceLib @vzakhari
 SYCL/DeviceLib/ITTAnnotations @vzakhari @MrSidims
 
-# Device code split
-SYCL/DeviceCodeSplit @intel/dpcpp-tools-reviewers
+# Group algorithms
+/SYCL/GroupAlgorithm/ @Pennycook @intel/llvm-reviewers-runtime
+/SYCL/GroupLocalMemory/ @Pennycook @intel/llvm-reviewers-runtime
+/SYCL/SubGroup/ @Pennycook @intel/llvm-reviewers-runtime
+/SYCL/SubGroupMask/ @Pennycook @intel/llvm-reviewers-runtime
+
+# Plugin interface for Level Zero
+/SYCL/Plugin/*level[-_]zero* @intel/dpcpp-l0-pi-reviewers
 
 # Explicit SIMD
 config_sycl/esimd* @kychendev @kbobrovs @v-vklochkov
@@ -68,11 +74,11 @@ SYCL/USM @jbrodman @sergey-semenov
 SYCL/Basic/stream @againull
 
 # Test scripts
-*.pl @yuxianch @myler @yamanwan
-*.list @yuxianch @myler @yamanwan
+*.pl @myler @yamanwan
+*.list @myler @yamanwan
 
 # tc files
-*.xml @yuxianch @myler @yamanwan
+*.xml @myler @yamanwan
 
 # Deprecated features
 SYCL/DeprecatedFeatures @intel/llvm-reviewers-runtime
@@ -96,9 +102,6 @@ SYCL/XPTI @intel/llvm-reviewers-runtime
 # Plugin interface for Level Zero
 /SYCL/Plugin/*level[-_]zero* @intel/dpcpp-l0-pi-reviewers
 
-# Explicit SIMD
-/SYCL/ESIMD/ @intel/dpcpp-esimd-reviewers
-
 # BFloat16 conversion
 /SYCL/BFloat16/ @AlexeySotkin @intel/dpcpp-tools-reviewers
 

SYCL/AtomicRef/atomic_memory_order_acq_rel.cpp

@@ -9,7 +9,7 @@
 
 // NOTE: Tests load and store for acquire-release memory ordering.
 
-#include "atomic_memory_order_acq_rel.h"
+#include "atomic_memory_order.h"
 #include <iostream>
 using namespace sycl;
 
@@ -24,21 +24,10 @@ int main() {
     return 0;
   }
 
-  constexpr int N = 32;
-
   // Acquire-release memory order must also support both acquire and release
   // orderings.
   assert(is_supported(supported_memory_orders, memory_order::acquire) &&
          is_supported(supported_memory_orders, memory_order::release));
-  acq_rel_test<int>(q, N);
-  acq_rel_test<unsigned int>(q, N);
-  acq_rel_test<float>(q, N);
-
-  // Include long tests if they are 32 bits wide
-  if constexpr (sizeof(long) == 4) {
-    acq_rel_test<long>(q, N);
-    acq_rel_test<unsigned long>(q, N);
-  }
 
   std::cout << "Test passed." << std::endl;
 }