Signed-off-by: Ci Tian <ci.tian@intel.com>

citian-intel · citian-intel · commit a2d3fd89d5df · 2020-09-22T11:17:12.000-04:00
remove the extra include of CL/sycl.hpp
diff --git a/DirectProgramming/DPC++FPGA/Tutorials/Features/max_interleaving/src/max_interleaving.cpp b/DirectProgramming/DPC++FPGA/Tutorials/Features/max_interleaving/src/max_interleaving.cpp
@@ -14,7 +14,6 @@
 
 // Header locations and some DPC++ extensions changed between beta09 and beta10
 // Temporarily modify the code sample to accept either version
-#include <CL/sycl.hpp>
 #define BETA09 20200827
 #if __SYCL_COMPILER_VERSION <= BETA09
   #include <CL/sycl/intel/fpga_extensions.hpp>
